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Wafer-to-Wafer Integration을 위한 생산수율 챌린지에 대한 연구

Manufacturing yield challenges for wafer-to-wafer integration

김은경
한국마이크로전자및패키징학회 (The Microelectronics And Packaging Society)|2013.03|마이크로전자 및 패키징학회지 (Jornal of the Microelectronics and Packaging Society)|제20권 제1호|pp. 1-5|DOI http://dx.doi.org/10.6117/kmeps.2013.20.1.001

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키워드

TSVYield3D stacked IC3D IntegrationWafer-to-Wafer
주제분류재료공학

초록

Wafer-to-Wafer (W2W) integration technology is an emerging technology promising many benefits, such as reduced size, improved performance, reduced power, lower cost, and divergent integration. As the maturity of W2W technology progresses, new applications will become more viable. However, at present the cost for W2W integration is still very high and both manufacturing yield and reliability issues have not been resolved yet for high volume manufacturing (HVM). Especially for WTW integration resolving compound yield issue can be a key factor for HVM. To have the full benefits of WTW integration technology more than simple wafer stacking technologies are necessary. In this paper, the manufacturing yield for W2W integration is described and the challenges of WTW integration will be discussed.

Abstract

Wafer-to-Wafer (W2W) integration technology is an emerging technology promising many benefits, such as reduced size, improved performance, reduced power, lower cost, and divergent integration. As the maturity of W2W technology progresses, new applications will become more viable. However, at present the cost for W2W integration is still very high and both manufacturing yield and reliability issues have not been resolved yet for high volume manufacturing (HVM). Especially for WTW integration resolving compound yield issue can be a key factor for HVM. To have the full benefits of WTW integration technology more than simple wafer stacking technologies are necessary. In this paper, the manufacturing yield for W2W integration is described and the challenges of WTW integration will be discussed.

참고문헌 (25)

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