Multi Stage Noise Shaping Delta-Sigma Modulator
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초록
This paper presents a multi stage noise shaping (MASH) delta-sigma modulator (DSM) for high speed data signal processing. This delta-sigma modulator (DSM) is discrete-time modulator (DT) and sampling of the input signal occurs prior to the loop filter. Discrete-time (DT) modulator has lower performance degradation from excess loop delay, clock jitter, process variation than Continuous-time (CT) modulator. A 4-Phase buck converter is used to supply power in delta-sigma modulator (DSM). The delta-sigma modulator (DSM) power supply is 1.8V. The buck converter has low EMI using spread spectrum. To implement spread spectrum, the paper proposes random clock generator. The buck converter supply voltage 3V and Output voltage is 1.8V. Switching frequency ranges from 7 to 9 MHz and Maximum load current is 500mA. The delta-sigma modulator (DSM) and buck converter is fabricated in 0.18㎛ CMOS process and circuit type is Mixed-design.
Abstract
This paper presents a multi stage noise shaping (MASH) delta-sigma modulator (DSM) for high speed data signal processing. This delta-sigma modulator (DSM) is discrete-time modulator (DT) and sampling of the input signal occurs prior to the loop filter. Discrete-time (DT) modulator has lower performance degradation from excess loop delay, clock jitter, process variation than Continuous-time (CT) modulator. A 4-Phase buck converter is used to supply power in delta-sigma modulator (DSM). The delta-sigma modulator (DSM) power supply is 1.8V. The buck converter has low EMI using spread spectrum. To implement spread spectrum, the paper proposes random clock generator. The buck converter supply voltage 3V and Output voltage is 1.8V. Switching frequency ranges from 7 to 9 MHz and Maximum load current is 500mA. The delta-sigma modulator (DSM) and buck converter is fabricated in 0.18㎛ CMOS process and circuit type is Mixed-design.
참고문헌 (21)
- K. Vleugels, "A 2.5-V sigma delta modulator for broadband communications applications", IEEE J. Solid-State Circuits, 36, pp.1887~1899 (2001)
- G. Mitteregger, "A 20-mW 640-MHz CMOS Continuous-Time sigma delta ADC With 20-MHz Signal Bandwidth, 80-dB Dynamic Range and 12-bit ENOB", IEEE J. Solid-State Circuits, 41, pp.2641~2649 (2006)
- R. Schreier, "Understanding Delta-Sigma Data Converters" (2005), IEEE Press
- Ramin Zanbaghi, "A 75-dB SNDR, 5-MHz Bandwidth Stage-Shared sigma delta Modulator Dissipating 16mW Power", IEEE trans. Circuits and Syst. I, 59, pp.1614~1625 (2012)
- J. Roh, "A 0.9-V 60-μW 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range", IEEE J. Solid-State Circuits, 43, pp.361~370 (2008)
- J. Silva, "Wideband low-distortion delta-sigma ADC topology", Electron. Lett., 37, pp.737~738 (2001)
- Xuefeng Chen, "A 18mW CT sigma delta Modulator with 25MHz Bandwidth for Next Generation Wireless Applications", IEEE 2007Custom Intergrated Circuits Conference (CICC), pp.73~76 (2007)
- M. Ranjbar, "A A Multibit Dual-Feedback CT sigma delta Modulator With Lowpass Signal Transfer Function", IEEE Transactions on Circuits and Systems I: Regular Papers, 58, pp.2083~2095 (2011)
- B. Razivi, "Design of Analog CMOS Integrated Circuits" (2001), McGraw-Hill
- D. A. Johns, "Analog Integrated Circuit Design" (1997), John Wiley & Sons
- S. H. Jung, "An integrated CMOS DC-DC converter for battery-operated systems", Power Electronics Specialists Conference, 1999. PESC 99. 30th Annual IEEE, 1, pp.43~ (1999)
- R.W. Erickson, "Fundamentals of Power Electronics" (2001), Springer
- Youngkook Ahn, "A Multiphase Buck Converter With A Rotating Phase-Shedding Scheme For Efficient Light-Load Control", IEEE Journal of Solid-State Circuits, 49(11), pp.2673~2683 (2014)
- Dieter Gollmann, "PSEUDO RANDOM PROPOERTIES OF CASCADE CONNECTIONS OF CLOCK CONTROLLED SHIFT REGISTERS", Lectures Notes in Computer Science, 209, pp.93~98 (2000)
- Thanh Tien Ha, "A Buck DC-DC Converter Using Automatic PFM", PWM Mode Change for High-Efficiency Li-Ion Battery Charger, 2014, 238~239
- Wan-Rone Liou, "A High Efficiency Dual-Mode Buck Converter IC For Portable Applications", IEEE TRANSACTIONS ON POWER ELECTRONICS, 23(2), pp.667~677 (2008)
- H. Peng, "A 100MHz two-phase four-segment DC-DC converter with light load efficiency enhancement in 0.18um CMOS", IEEE Trans. Circuits syst. I. Reg. Papers, 60(8), pp.2213~2224 (2013)
- A. S. R. Oliveira, "The ARPA-MT embedded SMT processor and its RTOS hardware accelerator", IEEE Trans. Ind. Electron, 58(3), pp.890~904 (2011)
- Y.-S. Hwang, "Dynamic power management technique for multi-core based embedded mobile devices", IEEE Trans. Ind. Informat., 9(3), pp.1601~1612 (2013)
- G. Gammie, "Smartreflex power and performance management technologies for 90nm, 65 nm, 45 nm mobile application processors", Proc. IEEE, 98(2), pp.144~159 (2010)
- Y. K. Lo, "Dual-mode-control multiphase DC", DC converter, 2007, pp.1(2), 229~238
