본문 바로가기
KERD
논문KCI 등재

Pseudo-differential OTA Design with ±0.9V Wide Input Swing Range in 0.18μm Submicron Technology

0

조회

0

다운로드

0

인용

0

참고문헌

초록

In this paper we present a novel approach in the design of a pseudo-differential operational transconductance amplifier having a wide input range being adapted to the implementation of a 9th-order Bessel filter. Inclusion of a PMOS device biased at the subthreshold and triode regions facilitated an improvement of 40% in the input swing range by suspending half of the supply, while maintaining degradation of transconductance Gm to less than 1%. The operational transconductance amplifier is fabricated using a 0.18-µm n-well 1P5M CMOS process with a 1.8V supply. Results through measurement show 1% Gm variation, and a total harmonic distortion of below −62dB under the input swing range of ±0.9V. The 9th order Bessel filter shows the cutoff frequency of 100MHz highly desirable for a digital versatile disc pickup circuit operating at 16 times normal speed.

Abstract

In this paper we present a novel approach in the design of a pseudo-differential operational transconductance amplifier having a wide input range being adapted to the implementation of a 9th-order Bessel filter. Inclusion of a PMOS device biased at the subthreshold and triode regions facilitated an improvement of 40% in the input swing range by suspending half of the supply, while maintaining degradation of transconductance Gm to less than 1%. The operational transconductance amplifier is fabricated using a 0.18-µm n-well 1P5M CMOS process with a 1.8V supply. Results through measurement show 1% Gm variation, and a total harmonic distortion of below −62dB under the input swing range of ±0.9V. The 9th order Bessel filter shows the cutoff frequency of 100MHz highly desirable for a digital versatile disc pickup circuit operating at 16 times normal speed.

참고문헌 (15)

  1. E. Sanchez-Sinencio, "CMOS transconductance amplifiers, architectures and active filters : a tutorial", IEE Proc. Circuits Devices Syst., pp.3~12 (2000)
  2. K. C. Kuo, "A linear MOS transconductor using source degeneration and adaptive biasing", IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., 48(10), pp.937~943 (2001)
  3. M. Mobarak, "Attenuation-predistortion linearization of CMOS OTAs with digital correction of process variationsin OTA-C filter applications", IEEE J. Solid-State Circuits, 45(2), pp.351~367 (2010)
  4. X. Zhang, "A novel CMOS OTA based on bodydriven MOSFETs and its applications in OTA-C filters", IEEE Trans. Circuits Syst. I, 54(6), pp.1204~1212 (2007)
  5. S. -H. Yang, "A novel CMOS operational transconductance amplifier based on a mobility compensation technique", IEEE Trans. Circuits Syst. II, 52(1), pp.3742~ (2005)
  6. C. Mingdeng, "A 2VPP 80-200-MHz fourth-order continuous-time linear phase filter with automatic frequency tuning", IEEE J. Solid-State Circuits, 38(10), pp.1745~1749 (2003)
  7. A. Kranti, "Nonclassical channel design in MOSFETs for improving OTA gain-bandwidth trade-off", IEEE Trans. Circuits Syst. I, 57(12), pp.3048~3054 (2010)
  8. A. N. Mohieldin, "A fully balanced pseudo-differential OTA with common-mode feedforward and inherent common-mode feedback detector", IEEE J. Solid-State Circuits, 38(4), pp.663~668 (2003)
  9. F. Rezzi, "A 3V pseudo-differential transconductor with intrinsic rejection of the common-mode input signal", Proc. Circuits and Systems, pp.85~88 (1994)
  10. Siva V. Thyagarajan, "Active-RC Filters Using the Gm-Assisted OTA-RC Technique", IEEE J. Solid-State Circuits, 46(7), pp.1522~1533 (2011)
  11. T. Y. Lo, "A high speed and high linearity OTA in 1-V power supply voltage", Proc. ISCAS, pp.1834~1867 (2006)
  12. T. Y. Lo, "A 1-V 50-MHz pseudodifferential OTA with compensation of the mobility reduction", IEEE Trans. Circuits Syst. II, 54(12), pp.1047~1051 (2007)
  13. T. Y. Lo, "A 40-MHz double differential-pair CMOS OTA with-60-dB IM3", IEEE Trans, Circtuis Syst. I, 55(1), pp.258~265 (2008)
  14. O. Abdelfattah, "An ultra-low-voltage CMOS process-insensitive self-biased OTA with rail-to-rail input range", IEEE Trans. on Circuits Syst. I, 62(10), pp.2380~2390 (2015)
  15. A. P. Nicholson, "A statistical design approach for a digitally programmable mismatch-tolerant high-speed Nauta structure differential OTA in 65-nm CMOS", IEEE Trans. on VLSI Systems, 24(9), pp.2899~2910 (2016)

관련 논문AI추천

이 간행물의 다른 논문 (5건)