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Calibration of Offset Voltage of Op-Amp for Bandgap Voltage Reference Using Chopping Technique and Switched-Capacitor Filter

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A calibration scheme is proposed for a bandgap voltage reference. The proposed scheme calibrates an offset voltage of operational amplifier (op-amp) of a bandgap reference which is the critical source of an output-voltage deviation of the bandgap reference. The proposed calibration is based on a chopping technique which makes an output voltage of op-amp modulate. An IIR filter is used to average out the modulated output voltage of chopped amplifier. The output voltage of IIR filter is fed into gate node of a PMOS current source which is located in the final output branch. As a result, the output reference voltage becomes insensitive to the offset voltage of op-amp. The proposed circuit was verified through Monte-Carlo simulations by using thick-oxide transistors in a 0.13-m CMOS process. In the simulation results, the proposed calibration suppresses the deviation of output reference voltage up to 1.94 mV for the temperature range between -40oC and 125oC. Also, the deviation of output reference voltage is reduced by 24.5 times through proposed calibration.

Abstract

A calibration scheme is proposed for a bandgap voltage reference. The proposed scheme calibrates an offset voltage of operational amplifier (op-amp) of a bandgap reference which is the critical source of an output-voltage deviation of the bandgap reference. The proposed calibration is based on a chopping technique which makes an output voltage of op-amp modulate. An IIR filter is used to average out the modulated output voltage of chopped amplifier. The output voltage of IIR filter is fed into gate node of a PMOS current source which is located in the final output branch. As a result, the output reference voltage becomes insensitive to the offset voltage of op-amp. The proposed circuit was verified through Monte-Carlo simulations by using thick-oxide transistors in a 0.13-m CMOS process. In the simulation results, the proposed calibration suppresses the deviation of output reference voltage up to 1.94 mV for the temperature range between -40oC and 125oC. Also, the deviation of output reference voltage is reduced by 24.5 times through proposed calibration.

참고문헌 (10)

  1. G. Ge, "A single-trim CMOS bandgap reference with a 3s inaccuracy of ±0. 15% from-40oC to 125oC", IEEE J. Solid-State Circuits, 46(11), pp.2693~2701 (2011)
  2. R. T. Perry, "A 1. 4V supply CMOS fractional bandgap reference", IEEE J. Solid-State Circuits, 42(10), pp.2180~2186 (2007)
  3. D. Spady, "A CMOS bandgap voltage reference with absolute value and temperature drift trims", Proc. IEEE ISCAS, 4, pp.3853~3856 (2005)
  4. B. Razavi, "Design of Analog CMOS Integrated Circuits" (2001), McGraw-Hill
  5. B. S. Song, "A precision curvature-compensated CMOS bandgap reference", IEEE J. Solid-State Circuits, SC-18(6), pp.634~6436 (1983)
  6. V. G. Ceekala, "A method for reducing the effects of random mismatches in CMOS bandgapreferences", IEEE ISSCC Dig. Tech. Papers, pp.318~319 (2002)
  7. Y. Jiang, "A low voltage low1", f noise CMOS bandgap reference, 2005, pp.4, 3877~3880
  8. J. -Y. Um, "Calibration of bandgap voltage reference using chopping technique and IIR filter", Electron. Lett., 52(13), pp.1104~1105 (2016)
  9. V. Ivanov, "An ultra low power bandgap operational at supply as low as 0.75V", Proc. Eur. Solid-State Circuits Conf. (ESSCIRC), pp.515~518 (2011)
  10. M. Seok, "A portable 2-transistor picowatt temperature-compensated voltage reference operating at 0. 5V", IEEE J. Solid-State Circuits, 47(10), pp.2534~2545 (2012)

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