Preparation of Field Effect Transistor with (Bi,La)Ti3O12 Gate Film on Y2O3/Si Substrate

Abstract

The field effect transistors (FETs) were fabricated on Y2O3/P-Si(100) substrates by the conventional memory processes and sol-gel process using (Bi,La)Ti3O12(BLT) ferroelectric gate materials. The remnant polarization (2Pr = Pr+-Pr-) for Pt/BLT/Pt/Si capacitors increased from 22 ?C/cm2 to 30 ?C/cm2 at 5V as the annealing temperature increased from 700oC to 750oC. There was no drastic degradation in the polarization values after applying the retention read pulse for 105.5 seconds. The capacitance-voltage data of Pt/BLT/Y2O3/Si capacitors at 5V input voltage showed that the memory window voltage decreased from 1.4V to 0.6V as the annealing temperature increased from 700oC to 750oC. The leakage current of the Pt/BLT/Y2O3/Si capacitors annealed at 750oC was about 510-8 A/cm2 at 5V. From the drain currents versus gate voltages (VG) for Pt/BLT/Y2O3/Si(100) FET devices, the memory window voltages increased from 0.3V to 0.8V with increasing the VG from 3V to 5V.