DC-DC buck converter using hopping technique and capacitor-less LDO regulator design for EMC
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In this paper, we increased the electromagnetic interference (EMI) reduction amount by improving frequency hopping control method and applying dead-time control technique. The original control method of frequency hopping creates unwanted frequency components during the transition of control clock. By improving the hopping control, unwanted frequency component is totally removed. Combining the optimized frequency hopping and dead-time method, the EMI reduced is up to 13.5dB at the fundamental switching frequency. Moreover, a low drop-out (LDO) regulator was designed with high noise immunity against the conducted EMI generated from the DC-DC converter. In this work, DC PSR (power-supply rejection) performance of the LDO regulator was enhanced by optimizing the DC PSR of the bandgap reference (BGR) circuit and the bandwidth was widen by eliminating the parasitic capacitances occurring at the gate of the pass transistor by adding the voltage dependent current source.
Abstract
In this paper, we increased the electromagnetic interference (EMI) reduction amount by improving frequency hopping control method and applying dead-time control technique. The original control method of frequency hopping creates unwanted frequency components during the transition of control clock. By improving the hopping control, unwanted frequency component is totally removed. Combining the optimized frequency hopping and dead-time method, the EMI reduced is up to 13.5dB at the fundamental switching frequency. Moreover, a low drop-out (LDO) regulator was designed with high noise immunity against the conducted EMI generated from the DC-DC converter. In this work, DC PSR (power-supply rejection) performance of the LDO regulator was enhanced by optimizing the DC PSR of the bandgap reference (BGR) circuit and the bandwidth was widen by eliminating the parasitic capacitances occurring at the gate of the pass transistor by adding the voltage dependent current source.
참고문헌 (13)
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- A. P. Patel, "High Power-Supply-Rejection (PSR) current-mode Low-Dropout (LDO) regulator", IEEE Trans. Circuits Syst.II, Exp. Briefs, 57(11), pp.868~873 (2010)
- Sungwoo Lee, "Accurate Dead-Time Control for Synchronous Buck Converter With Fast Error Sensing Circuits", IEEE Transactions on Circuits and Systems—I: Regular Papers, 60(11) (2013)
- K. Mainali, "Conducted EMI Mitigation Techniques for Switch-Mode Power Converters: A Survey", IEEE Transactions on Power Electronics, 25(9) (2010)
- B. Razavi, "Design of analog CMOS integrated circuits", McGraw-Hill
- S. Joo, "Output-capacitor-free LDO design methodologies for high EMI immunity", IEEE Trans. Electromagn. Compat
- S. Joo, "Power-supply rejection model analysis of capacitor-less LDO regulator design", IEICE Trans. Electron, E100-C(5) (2017)
- S. Joo, "PSR enhancement techniques for output-capacitor-free LDO regulator design", Analog Intgr Circ Sig Process, 93(2) (2017)
- "Agilent Technologies: E5072A"[URL]
- "Texas Instruments: BUF602"[URL]
