Design of Dual Mode DC-DC Buck Converter using Segmented Output Stage
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This paper presents a dual mode DC-DC buck converter using a segmented output stage. It operates in the SFM (switching frequency modulation) mode under light load and the PWM (pulse width modulation) mode under heavy load to enhance power efficiency over wide range loads. Also an output stage is segmented under light load in order to decrease switching power dissipation. The proposed circuit has been designed in a 0.35 μm CMOS process. Simulation results show that the circuit receives an input voltage of 2.9 V~4.2 V and generates an output voltage of 1.75 V~2.0 V. Also, the circuit has a maximum efficiency of 93.8% over the load current range of 10 mA~200 mA.
Abstract
This paper presents a dual mode DC-DC buck converter using a segmented output stage. It operates in the SFM (switching frequency modulation) mode under light load and the PWM (pulse width modulation) mode under heavy load to enhance power efficiency over wide range loads. Also an output stage is segmented under light load in order to decrease switching power dissipation. The proposed circuit has been designed in a 0.35 μm CMOS process. Simulation results show that the circuit receives an input voltage of 2.9 V~4.2 V and generates an output voltage of 1.75 V~2.0 V. Also, the circuit has a maximum efficiency of 93.8% over the load current range of 10 mA~200 mA.
참고문헌 (14)
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