본문 바로가기
KERD
논문KCI 등재

Capless Low-Dropout Regulator with Voltage Damper and Body Bias Feedback with Fast Transient Response

2

조회

0

다운로드

0

인용

0

참고문헌

키워드

초록

This paper presents an output cap-less low-dropout regulator (LDO) using a voltage damper and body bias feedback for fast load transient response. The voltage damper makes load transient fast. To make the LDO react to relatively slow distortion of the output, the body bias feedback is included. The proposed LDO regulator is fabricated in a 0.18μm CMOS process with an active area of 0.026mm2 and an on-chip capacitance of 9.32pF. The operating conditions are set to an input voltage of 1.8V, a maximum load current of 100mA, and an output voltage of 1.6V. The maximum undershoot was 284 mV and the maximum overshoot was 199 mV.

Abstract

This paper presents an output cap-less low-dropout regulator (LDO) using a voltage damper and body bias feedback for fast load transient response. The voltage damper makes load transient fast. To make the LDO react to relatively slow distortion of the output, the body bias feedback is included. The proposed LDO regulator is fabricated in a 0.18μm CMOS process with an active area of 0.026mm2 and an on-chip capacitance of 9.32pF. The operating conditions are set to an input voltage of 1.8V, a maximum load current of 100mA, and an output voltage of 1.6V. The maximum undershoot was 284 mV and the maximum overshoot was 199 mV.

참고문헌 (13)

  1. D. D. Buss, "Technology in the Internet Age", Proc. ISSCC Dig. Tech. Papers, pp.18~ (2002)
  2. R. J. Milliken, "Full on-chip CMOS low-dropout voltage regulator", IEEE Trans. Circuits Syst. I, Reg. Papers, 54(9), pp.1879~1890 (2007)
  3. V. Gupta, "A 5mA 0.6μm CMOS Miller compensated LDO regulator with -27dB worst-case power-supply rejection using 60pF of on-chip capacitance", Proc. IEEE Int. Solid-State Circuits Conf, pp.520~521 (2007)
  4. B. Yang, "A high-PSR LDO using a feedforward supply-noise cancellation technique", Proc. IEEE Custom Integr. Circuits Conf, pp.1~4 (2011)
  5. C. -J. Park, "External capacitor-less low drop-out regulator with 25 dB superior power supply rejection in the 0. 4–4 MHz range", IEEE J. Solid-State Circuits, 49(2), pp.486~501 (2014)
  6. Y. Lu, "A fully-integrated low-dropout regulator with full-spectrum power supply rejection", IEEE Trans. Circuits Syst. I, Reg. Papers, 62(3), pp.707~716 (2015)
  7. J. Zarate-Roldan, "A capacitor-less LDO with high-frequency PSR suitable for a wide range of on-chip capacitive loads", IEEE Trans. Very Large Scale Integr. (VLSI)Syst, 24(9), pp.2970~2982 (2016)
  8. C.-J. Park, "Design techniques for external capacitor-less LDOs with high PSR over wide frequency range", Proc. IEEE 57th Int. Midwest Symp. Circuits Syst. (MWSCAS), pp.342~345 (2014)
  9. J. Tang, "Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier", IEEE Transactions on Circuits and Systems II : Express Briefs, 66(3), pp.462~466 (2019)
  10. A. Hokazono, "Forward Body Biasing as a Bulk-Si CMOS Technology Scaling Strategy", IEEE Transactions on Electron Devices, 55(10), pp.2657~2664 (2008)
  11. B. Razavi, "Design of Analog CMOS Integrated Circuits" (2001), McGrawHill
  12. C. Lovaraju, "A Capacitor-less Low Drop-out (LDO) Regulator with Improved Transient Response for System-on-Chip Applications", 26th International Conference on VLSI Design and the International Conference on Embedded Systems, pp.130~135 (2013)
  13. J. Tang, "Low-Power Fast-Transient Capacitor-Less LDO Regulator With High Slew-Rate Class-AB Amplifier", IEEE Transactions on Circuits and Systems II : Express Briefs, 66(3), pp.462~466 (2019)

관련 논문AI추천

이 간행물의 다른 논문 (8건)