Design of a Low-Quiescent-Current Gate-Pole-Dominant Low-Dropout-Regulator
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Recently, for the mobile and internet-of-things applications, the level of integration is getting higher. Low-dropout voltage regulators (LDOs) get popular in integrated circuit design including functions such as reducing switching ripples from high-efficiency regulators, canceling spurs from other loads, and giving different supply voltages to loads. Following load applications, choosing proper LDOs is important. LDOs can be classified by the types of power MOSFET, the topologies of the error amplifier, and the locations of the dominant pole. Analog loads such as voltage-controlled oscillators and analog-to-digital converters need LDOs that have high power-supply-ripple-rejection-ratio (PSRR), high accuracy, and low noise. We present a low-quiescent-current fully-integrated LDO that obtains the desired PSRR.
Abstract
Recently, for the mobile and internet-of-things applications, the level of integration is getting higher. Low-dropout voltage regulators (LDOs) get popular in integrated circuit design including functions such as reducing switching ripples from high-efficiency regulators, canceling spurs from other loads, and giving different supply voltages to loads. Following load applications, choosing proper LDOs is important. LDOs can be classified by the types of power MOSFET, the topologies of the error amplifier, and the locations of the dominant pole. Analog loads such as voltage-controlled oscillators and analog-to-digital converters need LDOs that have high power-supply-ripple-rejection-ratio (PSRR), high accuracy, and low noise. We present a low-quiescent-current fully-integrated LDO that obtains the desired PSRR.
참고문헌 (6)
- Maxim Integrated, "Tutorial: Regulator Topologies for Battery-Powered Systems", ~ (2001)
- C. Zhan, "Output-capacitor-free adaptively biased low-dropout regulators", 2010 IEEE International Conference of Electron Devices and Solid-State Circuits, EDSSC 2010, 57(5), pp.1017~1028 (2010)
- M. Ho, "A low-power fasttransient 90-nm low-dropout regulator with multiple small-gain stages", IEEE Journal of Solid-State Circuits, 45(11), pp.2466~2475 (2010)
- J. Roh, "A 0.9-V 60-μW 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range", IEEE Journal of Solid-State Circuits, 43(2), pp.361~370 (2008)
- X. Liu, "A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation", Digest of Technical Papers -IEEE International Solid-State Circuits Conference, 62, pp.234~236 (2019)
- Y. Lim, "An External Capacitorless Low-Dropout Regulator with High PSR at All Frequencies from 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique", IEEE Journal of Solid-State Circuits, 53(9), pp.2675~2685 (2018)