Design of a wireless transceiver in 0.18um CMOS technology for LoRa application
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초록
The design circuit will cover the design and study of CMOS wireless transceiver for Long Range Radio (LoRa) application. As the communication method, it adopts Chirp Spread Spectrum (CSS) modulation which has low power and excellent processing gain and is designed as a transceiver structure suitable for long distance communication. A direct-conversion transceiver that does not use an intermediate frequency is analog to digital converter (ADC), a digital to analog converter (DAC), a low-pass filter (LPF), a variable gain amplifier (VGA), a low noise amplifier (LNA), power amplifier (PA), and Phase Locked Loop (PLL) blocks. This RF chip is designed for the 018um process, with a supply voltage of 1.8V and a maximum operating frequency of 950MHz.
Abstract
The design circuit will cover the design and study of CMOS wireless transceiver for Long Range Radio (LoRa) application. As the communication method, it adopts Chirp Spread Spectrum (CSS) modulation which has low power and excellent processing gain and is designed as a transceiver structure suitable for long distance communication. A direct-conversion transceiver that does not use an intermediate frequency is analog to digital converter (ADC), a digital to analog converter (DAC), a low-pass filter (LPF), a variable gain amplifier (VGA), a low noise amplifier (LNA), power amplifier (PA), and Phase Locked Loop (PLL) blocks. This RF chip is designed for the 018um process, with a supply voltage of 1.8V and a maximum operating frequency of 950MHz.
참고문헌 (11)
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