Design of a Low power Transmitter for Biomedical application in 180nm CMOS
0
조회
0
다운로드
0
인용
0
참고문헌
키워드
초록
In this study, we propose a low-power transmitter system for biomedical applications. In particular, it aims at the development of a low-power transmitter targeting a capsule endoscopy among biomedical applications. It is necessary to transmit about 4 pictures per seconds for 8 hours for accurate endoscope. However, due to the limitation of the battery, it is difficult to transmit 4 pictures per seconds for 8 hours with a general battery. Therefore, by making a low-power transmitter, we improve the accuracy of the wireless endoscope regardless of the capacity of the battery. The proposed transmitter is consisted of counter-assisted digital PLL (Phase Locked Loops) and digital PA(Power amplifier) that consumes lower power than analog PA. The currently targeted low-power transmitter is a transmitter capable of 16 QAM modulation in order to have a data rate of 20Mbps at the frequency of the ISM band (433 ~ 435 MHz) and supply voltage is 1V for low power. This system was designed with TSMC Mixed-Signal RF 0.18um process.
Abstract
In this study, we propose a low-power transmitter system for biomedical applications. In particular, it aims at the development of a low-power transmitter targeting a capsule endoscopy among biomedical applications. It is necessary to transmit about 4 pictures per seconds for 8 hours for accurate endoscope. However, due to the limitation of the battery, it is difficult to transmit 4 pictures per seconds for 8 hours with a general battery. Therefore, by making a low-power transmitter, we improve the accuracy of the wireless endoscope regardless of the capacity of the battery. The proposed transmitter is consisted of counter-assisted digital PLL (Phase Locked Loops) and digital PA(Power amplifier) that consumes lower power than analog PA. The currently targeted low-power transmitter is a transmitter capable of 16 QAM modulation in order to have a data rate of 20Mbps at the frequency of the ISM band (433 ~ 435 MHz) and supply voltage is 1V for low power. This system was designed with TSMC Mixed-Signal RF 0.18um process.
참고문헌 (9)
- D. A. Johns, "Analog Integrated Circuit Design", pp.188~ (1997), Jonh Wiley & Sons
- S. H. Jung, "An integrated CMOS DC-DC converter for battery-operated systems", presented at Power Electronics Specialists Conference (PESC 99), 30th Annual IEEE, 1(2), pp.43~47 (1999)
- R. W. Erickson, "Fundamentals of Power Electronics" (2001), Springer
- Shinwoong Kim, "A 2GHz synthesized Fractional-N ADPLL with Dual-Referenced Interpolating TDC", IEEE Journal of Solid State Circuits, 51, pp.391~400 (2016)
- Minseob Lee, "A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC", IEEE International Solid-State Circuit Conference (2018)
- Xiayun Liu, "A 13 pJ", bit 900MHz QPSK, IEEE Journal of Solid State Circuits, pp.2014, 49(11)[DOI]
- Chih-Wei Yao, "A 2.8-3.2 GHz fractional-N Digital PLL with ADC-Assisted TDC and Inductively Coupled Fine-Tuning DCO", IEEE Journal of Solid State Circuits, 48, pp.698~710 (2012)
- Chih-Wei Yao, "A 14nm Fractional-N Digital PLL with 0.14psrms Jitter and -78dBc Fractional Spur for cellular RFICs", IEEE International Solid State Circuits Conference (2017)
- Hui Zhang, "Start-up Analysis for Differential Ring Oscillator with Even Number of Stages", IEEE Asia Pacific Conference on Circuits and Systems (2011)