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Ultra-Low Power Quadrature LO-Generator

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This work presents an ultra-low power quadrature local oscillation (LO) generator for mobile transceivers using a low-dropout (LDO) regulator and low noise voltage-controlled oscillator (VCO). Using a loop-gain stabilizer in LDO, the gain of the error amplifier can be constant in a wide range of load current or reference voltage. The LDO achieves high PSR and fast transient-response. Since the proposed LDO is based on the gate-pole dominant, it can be integrated on-chip. For low phase noise, NMOS-type LC-VCO is used. To reduce phase noise, a tail inductor was added. The LDO using a loop-gain stabilizer shows a fast response of 138 ns and a high PSR of −70 dB at 10 kHz to 1 MHz offset frequency, regulating output at 1.0 V with a 1.1 V supply voltage. The VCO shows a frequency range of 7.675 GHz to 12.301 GHz with a power consumption of 10 mW to 12 mW at a regulated supply of 1.0 V.

Abstract

This work presents an ultra-low power quadrature local oscillation (LO) generator for mobile transceivers using a low-dropout (LDO) regulator and low noise voltage-controlled oscillator (VCO). Using a loop-gain stabilizer in LDO, the gain of the error amplifier can be constant in a wide range of load current or reference voltage. The LDO achieves high PSR and fast transient-response. Since the proposed LDO is based on the gate-pole dominant, it can be integrated on-chip. For low phase noise, NMOS-type LC-VCO is used. To reduce phase noise, a tail inductor was added. The LDO using a loop-gain stabilizer shows a fast response of 138 ns and a high PSR of −70 dB at 10 kHz to 1 MHz offset frequency, regulating output at 1.0 V with a 1.1 V supply voltage. The VCO shows a frequency range of 7.675 GHz to 12.301 GHz with a power consumption of 10 mW to 12 mW at a regulated supply of 1.0 V.

참고문헌 (6)

  1. H. Yoon, "A 0.56–2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G–4G Multistandard Cellular Transceivers", IEEE Journal of Solid-State Circuits, 51(3), pp.614~625 (2016)
  2. X. Wang, "A Dynamically HighImpedance Charge-Pump-Based LDO With DigitalLDO-Like Properties Achieving a Sub-4-fs FoM", IEEE Journal of Solid-State Circuits, 55(3), pp.719~730
  3. P. Liu, "A LowQuiescent Current Off-Chip Capacitor-less LDO Regulator with UGCC Compensation", 2019 IEEE International Conference on Electron Devices and SolidState Circuits (EDSSC), pp.1~3 (2019)
  4. Razavi, "RF Microelectronics" (1998), Prentice-Hall
  5. Y. Lim, "An External Capacitor-Less UltralowDropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(11), pp.3006~3018 (2017)
  6. V. Gupta, "Analysis and design of monolithic, high PSR, linear regulators for SoC applications", IEEE International SOC Conference, 2004. Proceedings, pp.311~315 (2004)

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