5.25 GHz에서 넓은 이득 제어 범위를 갖는 저전력 가변 이득 프론트-엔드 설계
Design of Variable Gain Receiver Front-end with Wide Gain Variable Range and Low Power Consumption for 5.25 GHz
1
조회
0
다운로드
0
인용
0
참고문헌
키워드
초록
We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm CMOS technology.)
Abstract
We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm CMOS technology.)
참고문헌 (8)
- K.Kobayashi, "GaAs HBT 0.75-5 GHz multifunctional microwave-analog variable gain amplifier", IEEE Journal of Solid-State Circuits, 29(10), pp.1257~1261 (1994)
- Cameron T. Charles, "A 2-GHz CMOS variable gain amplifier optimized for low noise", IEEE International Symposium on Circuits and Systems, pp.2305~2308 (2006)
- Kwang-Jin Koh, "A gain boosting method at RF frequency using active feedback and its application to RF variable gain amplifier(VGA)", IEEE International Symposium on Circuits and Systems, 통권 : 3, pp.89~92 (2002)
- Y.S. Wang, "5.7GHz low-power variable gain LNA in 0.18 um CMOS", Electronics Letters, 41(2) (2005)
- T. Kien, "CMOS low noise amplifier design optimization technique", IEEE Trans. Microwave Theory and Techniques, 52(5), pp.1433~1442 (2004)
- MacEachern, L.A, "A charge-injection method for Gilbert cell biasing", IEEE Canadian Conference on Electrical and Computer Engineering, 통권 : 1, pp.365~368 (1998)
- Kivekas, K, "Design of low-voltage active mixer for direct conversion receivers", IEEE International Symposium on Circuits and Systems, 통권 : 4, pp.382~385 (2001)
- Zhenbiao Li, "A dual-band CMOS front-end with two gain modes for wireless LAN applications", IEEE Journal of Solid-State Circuits, 39(11), pp.1257~1261 (2004)