Design of a High-Gain Low-Power K-Band Mixer in 65-nm Bulk CMOS Technology
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This paper presents a single-balanced downconversion mixer for K-band applications requiring high conversion gain and compact integration. The proposed design incorporates gate inductive peaking at the RF transconductance stage to enhance the effective transconductance while simultaneously achieving input impedance matching. To address the limitations of conventional designs that require high LO drive levels, a transformer-based structure is introduced at the LO port, enabling differential LO injection and improved LO power efficiency. This configuration provides sufficient LO swing at the switching core without increasing power consumption or circuit complexity. The mixer is implemented in a 65-nm bulk CMOS process and occupies an area of 0.36 mm2 including probing pads. Measurement results show impedance matching around 24 GHz for both LO and RF ports, along with an RF-to-LO isolation greater than 22 dB. The simulated conversion gain is 5.1 dB with a 5 dBm LO drive, an input 1-dB compression point of –18 dBm, and a noise figure of 15 dB at 24 GHz.
Abstract
This paper presents a single-balanced downconversion mixer for K-band applications requiring high conversion gain and compact integration. The proposed design incorporates gate inductive peaking at the RF transconductance stage to enhance the effective transconductance while simultaneously achieving input impedance matching. To address the limitations of conventional designs that require high LO drive levels, a transformer-based structure is introduced at the LO port, enabling differential LO injection and improved LO power efficiency. This configuration provides sufficient LO swing at the switching core without increasing power consumption or circuit complexity. The mixer is implemented in a 65-nm bulk CMOS process and occupies an area of 0.36 mm2 including probing pads. Measurement results show impedance matching around 24 GHz for both LO and RF ports, along with an RF-to-LO isolation greater than 22 dB. The simulated conversion gain is 5.1 dB with a 5 dBm LO drive, an input 1-dB compression point of –18 dBm, and a noise figure of 15 dB at 24 GHz.
