A Wideband CMOS Down-conversion Mixer for 5G FR2 Applications
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This paper presents a wideband complementary metal–oxide–semiconductor (CMOS) down-conversion mixer that supports a frequency range of 24−40 GHz. The proposed design is based on a double-balanced active mixer with wideband active and output baluns. In this design, the transconductance stage of the proposed mixer is composed of a parallel-connected common-gate and common-source amplifier structures for wideband input impedance matching and single-ended-to-differential signal conversion. The output active balun performs differential-to-single-ended conversion as well as a solid output impedance matching to drive a single-ended load of 50 Ω. The selected output intermediate frequency is 10 GHz. The proposed mixer is fabricated using a 65-nm CMOS process. Applying an external local oscillator input power of 5 dBm, the implemented design attains conversion gains of 3.87 dB and 1.5 dB, single sideband noise figures of 13.62 dB and 15.58 dB, input 1-dB compression points of −3.17 dBm and −0.87 dBm, and input referred third-order intercept points of 0.67 dBm and 3.74 dBm in the 28 GHz and 39 GHz bands, respectively. The implemented design consumes 9.75 mW with a nominal supply of 1.0 V. The active area, including pads, measures 0.87 mm × 0.46 mm (0.40 mm2).
Abstract
This paper presents a wideband complementary metal–oxide–semiconductor (CMOS) down-conversion mixer that supports a frequency range of 24−40 GHz. The proposed design is based on a double-balanced active mixer with wideband active and output baluns. In this design, the transconductance stage of the proposed mixer is composed of a parallel-connected common-gate and common-source amplifier structures for wideband input impedance matching and single-ended-to-differential signal conversion. The output active balun performs differential-to-single-ended conversion as well as a solid output impedance matching to drive a single-ended load of 50 Ω. The selected output intermediate frequency is 10 GHz. The proposed mixer is fabricated using a 65-nm CMOS process. Applying an external local oscillator input power of 5 dBm, the implemented design attains conversion gains of 3.87 dB and 1.5 dB, single sideband noise figures of 13.62 dB and 15.58 dB, input 1-dB compression points of −3.17 dBm and −0.87 dBm, and input referred third-order intercept points of 0.67 dBm and 3.74 dBm in the 28 GHz and 39 GHz bands, respectively. The implemented design consumes 9.75 mW with a nominal supply of 1.0 V. The active area, including pads, measures 0.87 mm × 0.46 mm (0.40 mm2).
참고문헌 (9)
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