Design of 1:1 Transformer based 2-Stage Differential Low-noise Amplifier for W-band Radar
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초록
This paper introduces a 77-81 GHz CMOS low-noise amplifier (LNA) designed for FMCW radar applications, with the goal of achieving high gain and low noise figure. To attain these objectives, a two-stage differential common-source (CS) structure is adopted, and neutralization capacitors are employed in each stage to obtain high gain. The proposed LNA is implemented in bulk CMOS 65nm process, providing a gain of over 17 dB and a noise figure of less than 4.5 dB in the frequency range of 77-81 GHz. The chip size, including pads, is 0.69 𝛍m × 0.39 𝛍m.
Abstract
This paper introduces a 77-81 GHz CMOS low-noise amplifier (LNA) designed for FMCW radar applications, with the goal of achieving high gain and low noise figure. To attain these objectives, a two-stage differential common-source (CS) structure is adopted, and neutralization capacitors are employed in each stage to obtain high gain. The proposed LNA is implemented in bulk CMOS 65nm process, providing a gain of over 17 dB and a noise figure of less than 4.5 dB in the frequency range of 77-81 GHz. The chip size, including pads, is 0.69 𝛍m × 0.39 𝛍m.
참고문헌 (7)
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