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Design of a 2.4 GHz Dual-mode CMOS power amplifier

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This paper presents a dual-mode CMOS power amplifier operating at 2.4 GHz. We propose a dual mode power amplifier which allows power to be delivered through different paths depending on the mode. We use one output matching network. In order to compensate to the disadvantages of using other techniques, a dual-mode operating only with bias control was designed. It is fabricated with Magna Hynix 0.18 ㎛ CMOS process. When continues wave (CW) signal is input, saturation power is measured to be about 21.6 / 12.9 dBm at high power mode / low power mode and power added efficiency (PAE) is measured to be about 7.38 / 6.13% at HPM / LPM. Also, gain is measured to be about 17.4 / 8.3 dB at HPM / LPM.

Abstract

This paper presents a dual-mode CMOS power amplifier operating at 2.4 GHz. We propose a dual mode power amplifier which allows power to be delivered through different paths depending on the mode. We use one output matching network. In order to compensate to the disadvantages of using other techniques, a dual-mode operating only with bias control was designed. It is fabricated with Magna Hynix 0.18 ㎛ CMOS process. When continues wave (CW) signal is input, saturation power is measured to be about 21.6 / 12.9 dBm at high power mode / low power mode and power added efficiency (PAE) is measured to be about 7.38 / 6.13% at HPM / LPM. Also, gain is measured to be about 17.4 / 8.3 dB at HPM / LPM.

참고문헌 (11)

  1. Changhyun Lee, "2.4 GHz CMOS Power Amplifier with Mode Locking Structure to Enhance Gain", The Scientific World Journal, 2014, pp.967181~ (2014)
  2. Yun Yin, "An Efficiency-Enhanced Stacked 2.4-GHz CMOS Power Amplifier with Mode Switching Scheme for WLAN Applications", IEEE Transactions on Microwave Theory and Techniques, 63 (2015)
  3. Ichiro Aoki, "Distributed Active Transformer A New Power-Combining and Impedance-Transformation Technique", IEEE Transactions on Microwave Theory and Techniques, 50(1) (2002)
  4. A. Afsahi, "Linearized dualband power amplifiers with integrated baluns in 65 nm CMOS for a 2x2 802.11 n MIMO WLAN SoC", IEEE J. Solid-State Circuits, 45(5), pp.955~966 (2010)
  5. Gao Ang, "A 1.6–10.9 GHz voltage-controlled ring oscillator for the serial interface of high-speed data converters. In: Solid-State and Integrated Circuit Technology (ICSICT)", 2014 12th IEEE International Conference on IEEE, pp.1~3 (2014)
  6. Taehwan Joo, "A WLAN RF CMOS PA with Large-Signal Method", IEEE Transactions on Microwave Theory and Techniques, 61(3) (2013)
  7. H. Mosalam, "A high-efficiency good linearity 21 to 26.5 GHz fully integrated power amplifier using 0.18 μm CMOS technology", 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS) (2016)
  8. Changkun Park, "CMOS Power Cell with Improved Junction Breakdown Using Interdigitated Body Contact", Microwave and Optical Technology Letters, 49(12) (2007)
  9. Jun Tajima, "Design of two-stage fully-integrated CMOS power amplifier for K-band applications", IEEE Transactions on Microwave Theory and Techniques, MTT-32(5) (1984)
  10. Jaemin Jang, "A CMOS RF Power Amplifier Using an Off-Chip Transmission Line Transformer with 62% PAE", Microwave and Wireless Components Letters, 17 (2007)
  11. Xuemei Lei, "Design and analysis of a three-stage voltage-controlled ring oscillator", Journal of Semiconductors, 34(11), pp.2013~ (2013)[DOI]

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