Multi-level Waveform Generator with Delay Control for Low Distorted Class D Amplifiers
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초록
A multi-level waveform generator with delay control is proposed for improving total-harmonic distortion of class D amplifiers. The voltage-mode class D amplifier is a circuit that amplifies the output voltage at the load to be twice almost the power supply voltage by using an input driving signal. The conventional 3-level class D amplifier generates a lot of harmonics due to the switching operation, and the harmonics can only be removed by the frequency response characteristics of the load. A configuration of the class D amplifier that sets an intermediate voltage level to reduce the harmonics has been presented, but it is required to generate the driving waveform for this. The proposed waveform generator makes driving signals that can change the voltage applied to the amplifier load from three to five levels. The generated step time can be optimally set depending on the driving frequency by controlling the RC delay circuits in the edge detector of the proposed generator. The generator IC fabricated in the area of 840 µm × 640 µm using the TSMC 0.25 µm CMOS process shows 5-level driving waveforms converted the input pulse-width modulation signal of 200 kHz. The measurement results show that the intermediate step time can be adjusted to 0.48 µs by controlling the delay circuit of the proposed waveform generator.
Abstract
A multi-level waveform generator with delay control is proposed for improving total-harmonic distortion of class D amplifiers. The voltage-mode class D amplifier is a circuit that amplifies the output voltage at the load to be twice almost the power supply voltage by using an input driving signal. The conventional 3-level class D amplifier generates a lot of harmonics due to the switching operation, and the harmonics can only be removed by the frequency response characteristics of the load. A configuration of the class D amplifier that sets an intermediate voltage level to reduce the harmonics has been presented, but it is required to generate the driving waveform for this. The proposed waveform generator makes driving signals that can change the voltage applied to the amplifier load from three to five levels. The generated step time can be optimally set depending on the driving frequency by controlling the RC delay circuits in the edge detector of the proposed generator. The generator IC fabricated in the area of 840 µm × 640 µm using the TSMC 0.25 µm CMOS process shows 5-level driving waveforms converted the input pulse-width modulation signal of 200 kHz. The measurement results show that the intermediate step time can be adjusted to 0.48 µs by controlling the delay circuit of the proposed waveform generator.
참고문헌 (13)
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