A Miniaturized Plasmon Detector using 0.25 µm CMOS Process for Large-Scale Sub-Terahertz Imaging
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A miniaturized complementary metal-oxide-semiconductor (CMOS) detector circuit is presented for large-scale 0.2 THz imaging. The proposed detector consists of an integrated differential antenna, common-source (CS) Plasmon detector cores, a buffer stage including pre-amplifiers, and off-chip main amplifiers. The folded dipole structure is used for reducing the unit size of the detector area and supplying the gate bias of the differential CS detector cores. The converted DC outputs at the detector are combined in the drain of the preamplifier as currents and transmitted to the output of the buffer. The off-chip main amplifier, implemented using discrete components, provides a high voltage gain for increasing responsivity and band-pass frequency response for optimizing the electrical modulation in the source. The proposed detector, except for the main amplifiers, is implemented in the area of 500 µm × 370 µm by using 0.25 µm CMOS technology. The responsivity and noise equivalent power of the proposed detector circuit, including the amplifiers, at 0.2 THz were measured to be 2.57 MV/W and 43.61 pW/√Hz, respectively.
Abstract
A miniaturized complementary metal-oxide-semiconductor (CMOS) detector circuit is presented for large-scale 0.2 THz imaging. The proposed detector consists of an integrated differential antenna, common-source (CS) Plasmon detector cores, a buffer stage including pre-amplifiers, and off-chip main amplifiers. The folded dipole structure is used for reducing the unit size of the detector area and supplying the gate bias of the differential CS detector cores. The converted DC outputs at the detector are combined in the drain of the preamplifier as currents and transmitted to the output of the buffer. The off-chip main amplifier, implemented using discrete components, provides a high voltage gain for increasing responsivity and band-pass frequency response for optimizing the electrical modulation in the source. The proposed detector, except for the main amplifiers, is implemented in the area of 500 µm × 370 µm by using 0.25 µm CMOS technology. The responsivity and noise equivalent power of the proposed detector circuit, including the amplifiers, at 0.2 THz were measured to be 2.57 MV/W and 43.61 pW/√Hz, respectively.
참고문헌 (15)
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