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A 101.6-dB-SNDR Fully Dynamic Zoom ADC using a Closed-Loop Miller Compensated Floating Inverter Amplifier

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초록

A floating inverter amplifier (FIA) is an alternative amplifier for switched-capacitor circuits. FIA-based switched-capacitor circuits have both negative feedback and dynamic operation advantages. However, the self-cutoff operation creates time-varying operating points while acting as an amplifier. Therefore, a small-signal analysis cannot anticipate the system's response. This paper presents a circuit-design-oriented intuition to tame the step response of such circuits. Also, the simulation method using RF simulators is explained to verify the gain and noise performance. Finally, a Miller-compensated 2-stage FIA is designed based on described design procedure, then applied to a fully dynamic zoom ADC design. The prototype ADC achieves 101.6 dB signal-to-noise and distortion ratio (SNDR) with an SNDR-based Schreier figure of merit (FoM) of 174.2 dB at 2.56-MHz fs having linearly scalable bandwidth and power consumption as fs varies, as well as easy power duty-cycling.

Abstract

A floating inverter amplifier (FIA) is an alternative amplifier for switched-capacitor circuits. FIA-based switched-capacitor circuits have both negative feedback and dynamic operation advantages. However, the self-cutoff operation creates time-varying operating points while acting as an amplifier. Therefore, a small-signal analysis cannot anticipate the system's response. This paper presents a circuit-design-oriented intuition to tame the step response of such circuits. Also, the simulation method using RF simulators is explained to verify the gain and noise performance. Finally, a Miller-compensated 2-stage FIA is designed based on described design procedure, then applied to a fully dynamic zoom ADC design. The prototype ADC achieves 101.6 dB signal-to-noise and distortion ratio (SNDR) with an SNDR-based Schreier figure of merit (FoM) of 174.2 dB at 2.56-MHz fs having linearly scalable bandwidth and power consumption as fs varies, as well as easy power duty-cycling.

참고문헌 (7)

  1. M. Zhao, "A 4-μW bandwidth", power scalable delta-sigma modulator based on swing-enhanced floating inverter amplifiers, 2021, pp.57(3), 709~718
  2. X. Tang, "A 0.4-to-40MS", s 75.7dB-SNDR Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier, 2021, 376~377
  3. X. Tang, "A 13. 5-ENOB, 107-μW noise-Shaping SAR ADC with PVT-robust closed-Loop dynamic amplifier", IEEE J. Solid-State Circuits, 55(12), pp.3248~3259 (2020)
  4. X. Tang, "An energy-efficient comparator with dynamic floating inverter amplifier", IEEE J. Solid-State Circuits, 55(4), pp.1011~1022 (2020)
  5. "Device noise simulation of ΔΣmodulators" (1999)[URL]
  6. R. Schreier, "Design-oriented estimation of thermal noise in switched-capacitor circuits", IEEE Trans. Circuits Syst. I, Reg. Papers, 52(11), pp.2358~2368 (2005)
  7. E. Eland, "A 440-μW, 109. 8-dB DR, 106. 5-dB SNDR discrete-time zoom ADC with a 20-kHz BW", IEEE J. Solid-State Circuits, 56(4), pp.1207~1215 (2021)

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