전류 감지 회로를 이용한 빠른 과도응답특성을갖는 capless LDO 레귤레이터
Capless Low Drop Out Regulator With Fast Transient Response Using Current Sensing Circuit
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초록
본 논문에서는 전류 제어 회로를 이용하여 load Transient response 특성을 향상시킨 capless LDO(low drop-out) 레귤레이터를 제안하였다. LDO 레귤레이터 내부의 오차증폭기와 패스 트랜지스터 사이에 전류 조절 회로를 두어 전압 라인에 들어오는 전류특성을 개선시켜 기존의 LDO 레귤레이터보다 향상된 transient 응답특성을 갖는다. 제안된 회로는 cadence의virtuoso, spectre 시뮬레이터를 이용하여 0.18 um 공정에서 특성을 분석하였다. 실험 결과에 따르면, 제안된 회로 구성을 이용한 LDO의 load transient response는 기존 LDO과 비교하여 부하 전류가 rising time인 경우 1.954 us에서 1.378 us, fallingtime인 경우 19.48 us에서 13.33 us으로 약 29%, 28% 개선된 응답속도를 가진다.
Abstract
This paper present a capless low drop out regulator (LDO) that improves the load transient response characteristics byusing a current regulator. A voltage regulator circuit is placed between the error amplifier and the pass transistor insidethe LDO regulator to improve the current characteristics of the voltage line, The proposed fast transient LDO structurewas designed by a 0.18 um process with cadence’s virtuoso simulation. according to test results, the proposed circuit hasa improved transient characteristics compare with conventional LDO. the simulation results show that the transient ofrising increases from 1.954 us to 1.378 us and the transient of falling decreases from 19.48 us to 13.33 us compared withconventional capless LDO. this Result has improved response rate of about 29%, 28%.
참고문헌 (8)
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