1-1 MASH based on Pipelined-SAR ADC with a PVT Variation Robust Dynamic Amplifier
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초록
Noise Shaping-Successive Approximation Register (NS-SAR) Analog-to-Digital Converters (ADCs) offer high SNDR due to low quantization noise and low comparator noise which has NS-capability. However, to achieve high SNDR, the NS-SAR needs a high bit-quantizer rather than high order NTF limited by stability. A high bit-quantizer offers smaller residue at the end of conversion. This problem is again affected by comparator noise same as SAR, although the comparator noise is shaped by given NTF. This work addresses this issue through pipelined MASH structure which allows high SNDR with a low-quantizer and a low oversampling ratio (OSR), maintaining good stability and wide bandwidth (BW). The dynamic amplifier configured in the loop filter enables high speed and low power. Our proposed ADC operates at 100 MS/s, it consumes 1.9 mW from a 1.2 V supply and achieves 86.69 dB-SNDR and 6.25 MHz-BW, when OSR is 8.
Abstract
Noise Shaping-Successive Approximation Register (NS-SAR) Analog-to-Digital Converters (ADCs) offer high SNDR due to low quantization noise and low comparator noise which has NS-capability. However, to achieve high SNDR, the NS-SAR needs a high bit-quantizer rather than high order NTF limited by stability. A high bit-quantizer offers smaller residue at the end of conversion. This problem is again affected by comparator noise same as SAR, although the comparator noise is shaped by given NTF. This work addresses this issue through pipelined MASH structure which allows high SNDR with a low-quantizer and a low oversampling ratio (OSR), maintaining good stability and wide bandwidth (BW). The dynamic amplifier configured in the loop filter enables high speed and low power. Our proposed ADC operates at 100 MS/s, it consumes 1.9 mW from a 1.2 V supply and achieves 86.69 dB-SNDR and 6.25 MHz-BW, when OSR is 8.
참고문헌 (7)
- Fredenburg, Jeffrey A., "A 90-ms", s 11-mhz-bandwidth 62-db sndr noise-shaping sar adc, 2012, pp.47(12), 2898~2904
- P. Harpe, "A 10b", 12b 40 kS, conversionstep, pp.IEEE Journal of Solid-State Circuits, 2013[DOI]
- H. Zhuang, "A Second-Order Noise-Shaping SAR ADC with Passive Integrator and Tri-Level Voting", IEEE Journal of Solid-State Circuits, 54(6), pp.1636~1647 (2019)
- Y. Song, "A 12. 5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC", IEEE Journal of Solid-State Circuits, 55(2), pp.312~321 (2020)
- C. -K. Hsu, "A 77. 1-dB-SNDR 6. 25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping", IEEE Journal of Solid-State Circuits, 56(3), pp.739~749 (2021)
- Y. Song, "A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC", IEEE Journal of Solid-State Circuits, 56(6), pp.1772~1783 (2021)
- S. Oh et al., "A 80dB DR 6MHz Bandwidth Pipelined Noise-Shaping SAR ADC with 1-2MASH structure", 2020 IEEE Custom Integrated Circuits Conference (CICC), pp.1~4 (2020)