Pd/Cu/PVP 콜로이드를 이용한 고종횡비 실리콘 관통전극 내 구리씨앗층의 단차피복도 개선에 관한 연구
A Study on the Seed Step-coverage Enhancement Process (SSEP) of High Aspect Ratio Through Silicon Via (TSV) Using Pd/Cu/PVP Colloids
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The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/SiO2/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.
Abstract
The seed step-coverage enhancement process (SSEP) using Pd/Cu/PVP colloids was investigated for the filling of through silicon via (TSV) without void. TEM analysis showed that the Pd/Cu nano-particles were well dispersed in aqueous solution with the average diameter of 6.18 nm. This Pd/Cu nano-particles were uniformly deposited on the substrate of Si/SiO2/Ti wafer using electrophoresis with the high frequency Alternating Current (AC). After electroless Cu deposition on the substrate treated with Pd/Cu/PVP colloids, the adhesive property between deposited Cu layer and substrate was evaluated. The Cu deposit obtained by SSEP with Pd/Cu/PVP colloids showed superior adhesion property to that on Pd ion catalyst-treated substrate. Finally, by implementing the SSEP using Pd/Cu/PVP colloids, we achieved 700% improvement of step coverage of Cu seed layer compared to PVD process, resulting in void-free filling in high aspect ratio TSV.
참고문헌 (3)
- E. Beyne, , VLSI Technology, Systems, and Applications, 1 (2006)
- C. Gregory, , Temple, D, Electronic Components and Technology Conference (ECTC), 60, pp.1769~ (2010)
- M. Jürgen Wolf, , Electronic Components and Technology Conference, pp.563~ (2008)