Equivalent circuit model of MIM capacitor on silicon interposer for power distribution network impedance analysis
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초록
MIM capacitor test sample has been designed for modeling of the MIM capacitor on silicon interposer or chip. Equivalent circuit model of MIM capacitor is proposed, and the circuit model is verified using vector network analyzer (VNA) measurement. With the extracted parasitic components such as MIM capacitor capacitance, coupling parasitic capacitance and coupling parasitic parallel resistance, the self-impedance of the equivalent circuit model can be obtained. This circuit model is able to be applied for in chip or silicon interposer PDN. Also, the proposed model can be used to evaluate impedance of the chip accurately.
Abstract
MIM capacitor test sample has been designed for modeling of the MIM capacitor on silicon interposer or chip. Equivalent circuit model of MIM capacitor is proposed, and the circuit model is verified using vector network analyzer (VNA) measurement. With the extracted parasitic components such as MIM capacitor capacitance, coupling parasitic capacitance and coupling parasitic parallel resistance, the self-impedance of the equivalent circuit model can be obtained. This circuit model is able to be applied for in chip or silicon interposer PDN. Also, the proposed model can be used to evaluate impedance of the chip accurately.
참고문헌 (3)
- Sunohara, Masahiro, "Silicon interposer with TSVs (Through Silicon Vias) and fine multilayer wiring", Electronic Components and Technology Conference, 2008. ECTC 2008. 58th. IEEE (2008)
- Zhang, Xiaowu, "Development of through silicon via (TSV) interposer technology for large die (21× 21mm) fine-pitch Cu", low-k FCBGA package, 2009, ~
- Yoon, Kihyun, "Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer", Electronics Packaging Technology Conference, 2009. EPTC'09. 11th. IEEE (2009)