10 nm 이하 무접합 원통형 MOSFET의 온-오프전압 DELTA V _{on-off}에 대한 분석
Analysis of On-Off Voltage DELTA V _{on-off} in Sub-10 nm Junctionless Cylindrical Surrounding Gate MOSFET
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초록
본 논문에서는 10 nm 이하 무접합 원통형 MOSFET의 온-오프 전압 에 대하여 고찰하였다. 문턱전압이하 전류가 일 때 게이트 전압을 온 전압, 일 때 게이트 전압을 오프 전압으로 정의하고 그 차를 구하였다. 10 nm 이하에서는 터널링 전류를 무시할 수 없기 때문에 터널링 전류의 유무에 따라 의 변화를 관찰하였다. 이를 위하여 포아송방정식을 이용하여 채널 내 전위분포를 구하였으며 WKB 근사를 이용하여 터널링 전류를 구하였다. 결과적으로 10 nm 이하 JLCSG MOSFET에서 터널링 전류에 기인하여 가 증가하는 것을 알 수 있었다. 특히 8 nm 이하의 채널길이에서 급격히 증가하였으며 채널 반지름과 산화막 두께가 증가할수록 는 증가하는 것을 알 수 있었다.
Abstract
We investigated on-off voltage of sub-10 nm JLCSG (Junctionless Cylindrical Surrounding Gate) MOSFET. The gate voltage was defined as ON voltage for the subthreshold current of and OFF voltage for the subthresholdcurrent of , and the difference between ON and OFF voltage was obtained. Since the tunneling current was notnegligible at 10 nm or less, we observe the change of depending on the presence or absence of the tunnelingcurrent. For this purpose, the potential distribution in the channel was calculated using the Poisson equation and thetunneling current was calculated using the WKB approximation. As a result, it was found that was increaseddue to the tunneling current in JLCSG MOSFETs below 10 nm. Especially, it increased rapidly with channel lengths lessthan 8 nm and increased with increasing channel radius and oxide thickness.
참고문헌 (8)
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