하이브리드 MOSFET-CNTFET 기반 SRAM 디자인 방법에 관한 연구
A Study on the Design Method of Hybrid MOSFET-CNTFET based SRAM
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초록
높은 캐리어 이동도, 큰 포화 속도, 낮은 고유 정전 용량, 유연성, 그리고 투명성을 장점으로 가진 CNTFET(Carbon NanoTubeField Effect Transistor) 10,000개 이상을 현존하는 반도체 디자인 절차와 공정 프로세서를 활용하여 하나의 반도체 칩에 집적하는데 성공하였다. 제작된 반도체 칩의 3차원 다층 구조와 다양한 CNTFET 생산 공정 연구는 기존 MOSFET과 CNTFET를 하나의반도체 칩에 함께 사용하는 hybrid MOSFET-CNTFET 반도체 칩 제작에 대한 가능성을 보여주고 있다. 본 논문에서는 hybridMOSFET-CNTFET을 활용한 6T binary SRAM을 디자인하는 방법에 대해 논하고자 한다. 기존 MOSFET SRAM 또는 CNTFETSRAM 디자인 방법을 활용하여 hybrid MOSFET-CNTFET SRAM을 디자인 하는 방법을 소개하고 그 성능을 기존 MOSFETSRAM 그리고 CNTFET SRAM과 비교하고자 한다.
Abstract
More than 10,000 Carbon NanoTube Field Effect Transistors (CNTFETs), which have advantages such as highcarrier mobility, large saturation velocity, low intrinsic capacitance, flexibility, and transparency, have beensuccessfully integrated into one semiconductor chip using conventional semiconductor design procedures andmanufacturing processes. Three-dimensional multilayer structure of the CNTFET semiconductor chip and variousCNTFET manufacturing process research increase the possibility of making the hybrid MOSFET-CNTFET semiconductorchip which combines conventional MOSFETs and CNTFETs together in a semiconductor chip. This paper discussesa methodology to design 6T binary SRAM using hybrid MOSFET-CNTFET. By utilizing the existing MOSFET SRAMor CNTFET SRAM design method, we will introduce a method of designing a hybrid MOSFET-CNTFET SRAM andcompare its performance with the conventional MOSFET SRAM and CNTFET SRAM.
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