비동기식 저전력 MSP430 프로세서 코어의 게이트 수준 설계
Gate Level Design of Asynchronous Low-Power MSP430 Processor Core
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본 논문은 최근 저전력 요구가 중요시되는 센서네트워크의 센서 노드에 사용되는 프로세서에 관한 것이다. TI 사의 MSP430 프로세서 코어와 호환되는 프로세서를 비동기식 설계 기법을 적용하여 마이크로 컨트롤러 자체를 저전력화한다. 프로세서 코어 내부의 제어 로직을 AFSM (Asynchronous Finite State Machine)으로 기술하고 비동기 전용 합성툴을 사용하여 게이트 수준으로 설계하였으며, 데이터 패스 로직은 동기식의 것과 동일하게 설계 하였다. 마지막으로 설계된 프로세서 코어를 게이트 수준에서 동기식 방법과 성능 및 에너지 소모를 비교하였다. 또한, 특화된 비동기식 언어를 사용한 상위수준 합성 방법으로 설계된 동일한 프로세서 코어와도 성능, 에너지 소모을 비교하였다. 0.13 um 공정에서 ideal 클록을 가정한 시뮬레이션 결과, 동기식에 비해서는 성능은 동일하였고 에너지는 31.9 % 덜 소모하였다. 상위수준 합성 방법의 비동기식 설계 방법과는 2.7배 성능이 향상되었고, 28.8 % 에너지를 덜 소모하는 것을 확인하였다.
Abstract
With clockless design method an asynchronous version of MSP430 processor core was designed to pursue the reduction of power consumption. We use data path of synchronous design without change, and, for control path, we described inner control logics using asynchronous finite state machine (AFSM) and generated gate level netlist. The asynchronous version of MSP430 core was compared with an already designed asynchronous MSP430 core which employed the high-level asynchronous tool flow based on a specialized language and a clock based synchronous MSP430 core at 0.13 um CMOS technology. The maximum performance of the high-level tool flow version was only 40.6 % of the synchronous or the AFSM version. The AFSM version saves the energy consumption of the synchronous version and the TiDE tool version by about 31.9 % and 28.8 %, respectively.
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