센서 시스템을 위한 저전력 고신뢰의 비동기 디지털 회로 설계
Low Power Reliable Asynchronous Digital Circuit Design for Sensor System
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초록
The delay-insensitive Null Convention Logic (NCL) asynchronous design as one of innovative asynchronous logic design meth- odologies has many advantages of inherent robustness, power consumption, and easy design reuses. However, transistor-level structures of conventional NCL gate cells have weakness of high area overhead and high power consumption. This paper proposes a new NCL gate based on power gating structure. The proposed 4x4 NCL multiplier based on power gating structure is compared to the con- ventional NCL 4X4 multiplier and MTNCL(Multi-Threshold NCL) 4x4 multiplier in terms of speed, power consumption, energy and size using PTM 45nm technology.
Abstract
The delay-insensitive Null Convention Logic (NCL) asynchronous design as one of innovative asynchronous logic design meth- odologies has many advantages of inherent robustness, power consumption, and easy design reuses. However, transistor-level structures of conventional NCL gate cells have weakness of high area overhead and high power consumption. This paper proposes a new NCL gate based on power gating structure. The proposed 4x4 NCL multiplier based on power gating structure is compared to the con- ventional NCL 4X4 multiplier and MTNCL(Multi-Threshold NCL) 4x4 multiplier in terms of speed, power consumption, energy and size using PTM 45nm technology.
참고문헌 (6)
- 지화준, "저전력 비동기식 시스템 설계를 위한 혼합형 dual-rail data encoding 방식 제안 및 검증", 전자공학회논문지, 51(7), pp.96~102 (2014), 대한전자공학회
- 오명훈, "GALS 시스템에서의 저비용 데이터 전송을 위한 QDI 모델 기반 인코더", 디코더 회로 설계, 2006, pp.43(1), 27~36[DOI]
- Scott C. Smith, "Designing Asynchronous Circuits using NULL Convention Logic (NCL)" (2009), Morgan & Claypool Publishers
- F. A. Parsan, "Gate Mapping Automation for Asynchronous NULL Convention Logic Circuits", IEEE Trans. on VLSI Systems, 22(1), pp.99~112 (2014)
- 김경기, "NCL 기반의 저전력 ALU 회로 설계 및 구현", 한국산업정보학회논문지, 18(5), pp.59~65 (2013), 한국산업정보학회[DOI]
- Zhou, L, "Multi-Threshold NULL ConventionLogic (MTNCL): An ultra-low power asynchronous circuit design methodology", J. Low PowerElectron. Appl, 5, pp.81~100 (2015)