Effect of nano-scale strained Si layer grown on SiGe-on-insulator structure on MOSFET drain current improvement
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Utilizing low-temperature epitaxial technology, we have developed a novel MOSFET structure consisting of a nano- scale (< 15nm) strained Silicon (Si) layer grown on a nano-scale SiGe-on-insulator (SiGe-OI) structure. By fabricating n- MOSFETs based on this strained Si/SiGe/SiO2/Si structure, we experimentally studied two effects on the electron mobility in the inversion layer,as compared to MOSFETs based on the conventional silicon on insulator (SOI) structure: the effect of the Ge mole fractionin the SiGe layer, and the effect of the strained Si layer thickness. We observed that the current transport in the strained Silayer was enhanced by a factor of about 1.6 as compared to the unstrained Si in the conventional case. In addition, we foundthat in the case of a strained Si layer with a thickness of less than 15 nm, as the its thickness was reduced, the electron mobilityin the inversion layer decreased.
Abstract
Utilizing low-temperature epitaxial technology, we have developed a novel MOSFET structure consisting of a nano- scale (< 15nm) strained Silicon (Si) layer grown on a nano-scale SiGe-on-insulator (SiGe-OI) structure. By fabricating n- MOSFETs based on this strained Si/SiGe/SiO2/Si structure, we experimentally studied two effects on the electron mobility in the inversion layer,as compared to MOSFETs based on the conventional silicon on insulator (SOI) structure: the effect of the Ge mole fractionin the SiGe layer, and the effect of the strained Si layer thickness. We observed that the current transport in the strained Silayer was enhanced by a factor of about 1.6 as compared to the unstrained Si in the conventional case. In addition, we foundthat in the case of a strained Si layer with a thickness of less than 15 nm, as the its thickness was reduced, the electron mobilityin the inversion layer decreased.