전압제어 링 발진기용 저-면적 듀티 사이클 보정 회로
Low-area Duty Cycle Correction Circuit for Voltage-Controlled Ring Oscillator
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초록
최근 저전력 고속 디지털 데이터 통신을 구현 하기위해 많은 기술들이 개발되고 있는 추세이며 듀티사이클 보정에 관련된 기술도 그중 하나이다. 본 논문에서는 전압제어 링 발전기용 저-면적 듀티사이클 보정 회로를 제안하였다. 듀티사이클 보정 회로는 전압제어 링 발진기의 180도 위상차이를 이용하여 듀티사이클을 보정하는 회로이며, 제안된 저-면적 듀티사이클 회로는 기존의 플립플롭을 TSPC(True Single Phase Clocking) 플립플롭으로 변경하여 회로를 구성하였고 이로 인하여 저-면적 고성능 회로를 구현하였다. 일반적인 플립플롭을 대신하여 TSPC플립플롭을 사용하여 기존 회로 대비 저-면적으로 회로 구현이 가능하며 고속 동작에 용이하여 저-전력용 고성능 회로에 활용될 것으로 기대된다.
Abstract
Recently, many technologies have been developed to realize low power high speed digital data communication and one of them is related to duty cycle correction. In this paper, a low-area duty cycle correction circuit for a voltage-controlled ring generator is proposed. The duty cycle correction circuit is a circuit that corrects the duty cycle using a 180 degree phase difference of a voltage controlled ring oscillator. The proposed low-area duty cycle circuit changes a conventional flip-flop to a true single phase clocking (TSPC) flip-flop And a low-area high-performance circuit is realized. By using TSPC flip-flop instead of general flip-flop, it is possible to realize low-area circuit compared to existing circuit, and it is expected to be used for high-performance circuit for low-power because it is easy to operate at high speed.
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