본문 바로가기
KERD
논문KCI 등재

양면 열박리 테이프 기반 임시 접합 공정을 이용한 대면적 웨이퍼 레벨 고출력 전자패키지

Large Area Wafer-Level High-Power Electronic Package Using Temporary Bonding and Debonding with Double-Sided Thermal Release Tape

0

조회

0

다운로드

0

인용

0

참고문헌

키워드

주제분류공학일반

초록

High-power devices, such as LEDs and radars, inevitably generate a large amount of heat, which is the main cause of shortening lifespan, deterioration in performance, and failure of electronic devices. The embedded IC process can be a solution; however, when applied to large-area substrates (larger than 8 in), there is a limit owing to the difficulty in the process after wafer thinning. In this study, an 8-in wafer-level high-power electronic package based on the embedded IC process was implemented with temporary bonding and debonding technology using double-sided thermal release tape. Good heat-dissipation characteristics were demonstrated both theoretically and experimentally. These findings will advance the commercialization of high-power electronic packaging.

Abstract

High-power devices, such as LEDs and radars, inevitably generate a large amount of heat, which is the main cause of shortening lifespan, deterioration in performance, and failure of electronic devices. The embedded IC process can be a solution; however, when applied to large-area substrates (larger than 8 in), there is a limit owing to the difficulty in the process after wafer thinning. In this study, an 8-in wafer-level high-power electronic package based on the embedded IC process was implemented with temporary bonding and debonding technology using double-sided thermal release tape. Good heat-dissipation characteristics were demonstrated both theoretically and experimentally. These findings will advance the commercialization of high-power electronic packaging.

참고문헌 (9)

  1. B. -D. Han, "Heat dissipation materials technology for high-power electronic package", Proc. of the KIIEE, 30(1), pp.39~47 (2016)
  2. H. K. Lim, "Development and technology trends of heat dissipation composite materials for electronic materials", News Inf. Chem. Eng, 29(5), pp.554~560 (2011)
  3. J. M. Yook, "Small and Low-profile GaN Hybrid-IC LNA using Embedded-IC Process in Silicon", IEEE MTT-S Int. Microw. Workshop Series Adv. Mater. Process, pp.17488731(1~17488731(3 (2017)
  4. H. Lee, "Semiconductor package technology trends", The Magazine of the IEIE, 40(12), pp.1155~1161 (2013)
  5. 좌성훈, "MEMS 패키징 및 접합 기술의 최근 기술 동향", 마이크로전자 및 패키징학회지, 24(4), pp.9~17 (2017), 한국마이크로전자및패키징학회
  6. S. W. Lee, "Temporary Bonding and Debonding Adhesives for 3D Multichip Packaging", Polym. Sci. Technol, 24(3), pp.277~284 (2013)
  7. D. Kim, "A Compact and Low-profile GaN Power Amplifier Using Interposer-based MMIC Technology", IEEE 16th Electron. Packag. Technol. Conf, pp.672~675 (2014)
  8. J. Park, "Thermal Radiative Copper Oxide Layer for Enhancing Heat Dissipation of Metal Surface", Nanomaterials, 11(11), pp.2819(1)~2819(10) (2021)
  9. Y. Kim, "Plano-Convex Lens Fabrication for Distance Sensor based on Single Vision", Int. Conf. Electron. Inform. Commun, pp.18653695(1~18653695(3 (2019)

관련 논문AI추천

이 간행물의 다른 논문 (12건)