본문 바로가기
KERD
논문KCI 등재

AI 반도체 패키징을 위한 TGV 및 Cu 충전 연구의 최근 동향

Recent Research Trends in TGV and Cu-Filling for AI Semiconductor Packaging

정재필|선신희|천성경
한국마이크로전자및패키징학회 (The Microelectronics And Packaging Society)|2024.12|마이크로전자 및 패키징학회지 (Jornal of the Microelectronics and Packaging Society)|제31권 제4호|pp. 37-46|DOI doi.org/10.6117/kmeps.2024.31.4.037

0

조회

0

다운로드

0

인용

0

참고문헌

키워드

EtchingElectroplating2.5D PackagingThrough Glass Via (TGV)
주제분류재료공학

초록

GPU, TPU, NPU와 같은 AI 반도체는 ChatGPT와 같은 딥러닝 모델에 필수적이며, 고대역폭 메모리 (HBM) 가 성능을 향상시킨다. HBM 시장은 2022년부터 2029년까지 연평균 46%씩 성장할 것으로 예상된다. 반도체 패키징의열방출 및 신호 간섭과 같은 문제를 개선하기 위해서 3D-IC 스태킹 및 인터포저 기술이 사용되고 있다. 실리콘 인터포저는 몇 가지 문제를 겪고 있지만, Through Glass Via (TGV) 기술을 사용한 유리 인터포저는 기존의 Through Silicon Via (TSV) 보다 열관리, 신호 무결성, 비용의 효율성이 높다. 본 고에서는 AI 반도체의 신뢰성 및 성능향상을 위한 코어기술들인 TGV의 선택적 레이저 식각 (Selective Laser Etching), 기능층 증착 및 펄스 전해도금 등 TGV 제조 기술의 최근 연구동향에 대하여 서술하였다. SLE 기술을 통하여 레이저와 에칭 용액 (etchant)을 사용하여 기판에서 재료를 선택적으로제거하여 유리에 비아를 형성할 수 있다.

Abstract

AI semiconductors like GPUs, TPUs, and NPUs are crucial for deep learning models, with High Bandwidth Memory (HBM) enhancing performance. The HBM market is projected to grow annually by 46% from 2022 to 2029. To address challenges in semiconductor packaging, such as heat dissipation and signal interference, 3D-IC stacking and glass interposers with Through Glass Via (TGV) technology are emerging as key solutions. TGV improves thermal management, signal integrity, and cost efficiency. This paper discusses recent research trends in TGV manufacturing technologies, such as selective laser etching (SLE), functional layer deposition, and pulse electroplating, which are core technologies for enhancing the reliability and performance of AI semiconductors. SLE technology allows the formation of vias in glass by selectively removing material from a substrate using a laser and an etchant.

참고문헌 (37)

  1. H. J. Kim, "Research Trends in Domestic and International AI chips", Smart Media Journal, 13(3), pp.36~44 (2024)
  2. J. Navarro, "Adapting ChatGPT for Real-Time Interactive Machine Translation : Challenges and Solutions", Innovative Computer Sciences Journal, 10(1), pp.1~10 (2024)
  3. 2024 Issue Report: Current Status and Outlook of the HBM Market Driven by AI (in Kor.), "The Export-Import Bank of Korea Innovation Growth Finance Part 1", The Export-Import Bank of Korea, 1~16 (2024)
  4. A. B. Shorey, "Progress and application of through glass via (TGV) technology", 2016 Pan Pacific Microelectronics Symposium (Pan Pacific), pp.1~6 (2016)
  5. J. Zhao, "Thermal Performance of 2.5 D Packaging with the Through Glass Via (TGV) Interposer", 2023 24th International Conference on Electronic Packaging Technology (ICEPT), pp.1~4 (2023)
  6. B. K. Wang, "Thin glass substrates development and integration for through glass vias (TGV) with copper (Cu) interconnects", 2012 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), pp.247~250 (2012)
  7. Through glass vias (TGV) substrate market: Insights and forecast Valuates Reports, "Business Research Insights", 107~ (2024)
  8. P. Zhang, "A Collaborative Optimization Methodology for 2.5-D Advanced Package Considering Thermal and Power Integrity", 2024 IEEE 7th International Conference on Electronic Information and Communication Technology (ICEICT), pp.1281~1284 (2024)
  9. P. Zhang, "A Thermal and Power Integrity Co-Optimization Framework for 2.5-D Integrated Microsystem", IEEE Transactions on Circuits and Systems I: Regular Papers, pp.1~14 (2024)
  10. Q. Wang, "ATPlace2. 5D: Analytical Thermal-Aware Chiplet Placement Framework for Large-Scale 2.5 D-IC", 2024 IEEE, 2024, 1~9
  11. H. Wang, "Modeling and Characterization of Annealing Effect on the Cu Protrusion and Thermomechanically Behaviors of Through Glass Via", IEEE Transactions on Components, Packaging and Manufacturing Technology, 14(7), pp.1300~1307 (2024)
  12. M. Lueck, "Through glass vias (TGV) and aspects of reliability", 2015 IEEE 65th Electronic Components and Technology Conference (ECTC), pp.672~677 (2015)
  13. H. Hamed, "Applications, materials, and fabrication of micro glass parts and devices : An overview", Materials Today, 66, pp.194~220 (2023)
  14. C. Xu, "A New Method of TGVs for Fast Filling of Metal Paste", 2024 25th International Conference on Electronic Packaging Technology (ICEPT), pp.1~5 (2024)
  15. H. Wang, "Failure mechanisms investigation of through glass via (TGV) under thermal annealing and shock", 202425th International Conference on Electronic Packaging Technology (ICEPT), pp.1~6 (2024)
  16. K. G. Choi, "Eco-friendly glass wet etching for MEMS application : A review", J. Am. Ceram. Soc, 107(10), pp.6497~6515 (2024)
  17. J. Liu, "Ultrahigh aspect ratio through glass vias perforation utilizing selective laser-induced etching with nanochannels", Adv. Eng. Mater, 26(13), pp.2400397~ (2024)
  18. J. H. Kim, "The Effects of Etchant on via Hole Taper Angle and Selectivity in Selective Laser Etching", Micromachines, 15(3), pp.320~ (2024)
  19. C. Yu, "Application of through glass via(TGV)technology for sensors manufacturing and packaging", Sensors, 24(1), pp.171~ (2023)
  20. S. Onitake, "Direct copper metallization on glass technology", 2017 International Conference on Electronics Packaging (ICEP), pp.430~433 (2017)
  21. H. Pandey, "Localized surface roughening to improve adhesion of electroless seed layer in through-glass vias", Materials Science in Semiconductor Processing, 183, pp.108757~ (2024)
  22. K. Pawar, "Continuous electroless seed layer deposition in through-glass-vias by ultrasonic agitation", IEEE Transactions on Components, Packaging and Manufacturing Technology, 14(7), pp.1292~1299 (2024)
  23. S. H. Kee, "TSV Filling Technology using Cu Electrodeposition", Journal of Welding and Joining, 32(3), pp.11~18 (2014)
  24. S. Costello, "Electrodeposition of copper into high aspect ratio PCB micro-via using megasonic agitation", Microsystem technologies, 19, pp.783~790 (2013)
  25. S. Wu, "Synergistic effect of additives on filling of tapered TGV vias by copper electroplating", 2020 21st International Conference on Electronic Packaging Technology (ICEPT), pp.1~4 (2020)
  26. T. M. Braun, "Simulation of copper electrodeposition in through-hole vias", J. Electrochem. Soc, 167(1), pp.013510~ (2019)
  27. F. Yang, "Silicon dioxide(SiO2)solid blocking layer on through-glass via surface for efficient highly selective copper filling", Surfaces and Interfaces, 55, pp.105431~ (2024)
  28. P. Ogutu, "Superconformal filling of high aspect ratio through glass vias (TGV) for interposer applications using TNBT and NTBC additives", J. Electrochem. Soc, 162(9), pp.D457~ (2015)
  29. S. H. Jin, "The effects of polyvinylpyrrolidone molecular weight on defect-free filling of through-glass vias(TGVs)", J. Ind. Eng. Chem, 96, pp.376~381 (2021)
  30. D. P. Hong, "A study on Copper Via filling using organic additive and Pulse electroplating (in Kor.)", Master, pp.2016
  31. L. Hofmann, "Investigations regarding through silicon via filling for 3D integration by periodic pulse reverse plating with and without additives", Microelectronic Engineering, 88(5), pp.705~708 (2011)
  32. Y. H. Chang, "Through glass via(TGV)copper metallization and its microstructure modification", Journal of Materials Research and Technology, 31, pp.1008~1016 (2024)
  33. M. Tanaka, "High frequency characteristics of glass interposer", 2020IEEE 70th Electronic Components and Technology Conference (ECTC), pp.601~610 (2020)
  34. F. A. Veer, "The strength of glass, a nontransparent value", Heron-English Edition, 52(1, pp.2) (2007), 87~104
  35. R. F. Cook, "Strength and sharp contact fracture of silicon", J. Mater. Sci, 41, pp.841~872 (2006)
  36. Y. Lai, "Thermo-mechanical reliability of glass substrate and Through Glass Vias(TGV) : A comprehensive review", Microelectronics Reliability, 161, pp.115477~ (2024)
  37. K. Pan, "A comparative study of the thermomechanical reliability of fully-filled and conformal through-glass via", 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC), pp.1211~1217 (2022)

관련 논문AI추천

AI 반도체 패키징을 위한 최근의 Through-Glass Via (TGV) 형성 기술임채연, 정도현, 정재필한국마이크로전자및패키징학회 · 마이크로전자 및 패키징학회지2025 · 제32권 제2호인공지능 반도체 및 패키징 기술 동향김희주, 정재필한국마이크로전자및패키징학회 · 마이크로전자 및 패키징학회지2023 · 제30권 제3호TGV 형성을 위한 감광성 유리의 결정성이 비아홀 특성에 미치는 영향서용준, 한윤수한국결정성장학회 · 한국결정성장학회지2025 · 제35권 제4호저온 Cu 하이브리드 본딩을 위한 폴리머 본딩김지훈, 박종경한국마이크로전자및패키징학회 · 마이크로전자 및 패키징학회지2024 · 제31권 제3호차세대 반도체 패키징: 실리콘 포토닉스 기반 Co-packaged Optics의 연구 개발 현황김강석, 김영현, 신석영, 윤석현, 정현지, 정희윤, 조경진, 진태원한국마이크로전자및패키징학회 · 마이크로전자 및 패키징학회지2024 · 제31권 제4호글라스 인터포저 Seed Layer 형성을 위한 무전해 도금 최신 동향김선우, 김유빈, 남현진, 박세훈, 박수빈, 채수인한국마이크로전자및패키징학회 · 마이크로전자 및 패키징학회지2025 · 제32권 제1호

이 간행물의 다른 논문 (12건)

3D 반도체 패키징 적용을 위한 Sn-58wt%Bi 솔더의 취성 개선 전략 리뷰김종웅, 박민규, 김병준, 박연수pp. 1-17Ag 및 Cu 입자의 페이스트화를 통한 무가압 소결접합 기술구수진, 이지은, 김민재, 박선우, 박창수, 이종현, 이연호pp. 18-28차세대 반도체 패키징: 실리콘 포토닉스 기반 Co-packaged Optics의 연구 개발 현황조경진, 김영현, 정희윤, 정현지, 김강석, 신석영, 윤석현, 진태원pp. 29-36펨토초 레이저 버스트 모드를 활용한 비아홀 내벽의 레이저 유도 주기적 표면 구조 제어박지용, 김태식pp. 47-56반도체 소켓 마이크로 핀의 자동 결함 감지를 위한 객체 인식 알고리즘 기반 비전 검사 시스템 설계박윤아, 조해국, 지형용, 이학준, 정태영, 유영준, 김보현pp. 57-63
원문 보기