Nonlinearity analysis of 65nm 8bit Vernier Time-to-digital Converter
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This paper analyzes the nonlinearity of TDC (Time-to-Digital Converter) used in wireless bearing angle measure system by using INL (Integral Non-Linearity) and DNL (Differential Non-Linearity) specification. Nonlinearity can be represented by the distance error, which indicates the uncertainty of the angle and position in this system. We investigate the distance error based on INL and cause of nonlinearity from the viewpoint of layout. We compare pre and post layout simulations of parasitic resistance in metal power line, describing important layout points to keep in mind. Jitter and mismatch simulation are proposed for setting delay buffer size and TDC time resolution. Wire bonding inductance simulation is also considered for checking robust circuit operation. Verified TDC is an 8bit with a 18ps resolution. The measured DNL and INL were 0.8 LSB and -15 LSB. Samsung 65nm process was used.
Abstract
This paper analyzes the nonlinearity of TDC (Time-to-Digital Converter) used in wireless bearing angle measure system by using INL (Integral Non-Linearity) and DNL (Differential Non-Linearity) specification. Nonlinearity can be represented by the distance error, which indicates the uncertainty of the angle and position in this system. We investigate the distance error based on INL and cause of nonlinearity from the viewpoint of layout. We compare pre and post layout simulations of parasitic resistance in metal power line, describing important layout points to keep in mind. Jitter and mismatch simulation are proposed for setting delay buffer size and TDC time resolution. Wire bonding inductance simulation is also considered for checking robust circuit operation. Verified TDC is an 8bit with a 18ps resolution. The measured DNL and INL were 0.8 LSB and -15 LSB. Samsung 65nm process was used.
참고문헌 (11)
- S. Gezici, "Localization via ultra-wideband radios : a look at positioning aspects for future sensor networks", IEEE signal processing magazine., 22(4), pp.70~84 (2005)
- W. Gerok, "Influence of the real UWB antennas on the AoA estimation based on the TDoA localization technique", IEEE Middle East Conference on Antennas and Propagation (MECAP 2010) (2011)
- B. G. Yu, "A time-based angle-of-arrival sensor using CMOS IR-UWB transceivers", IEEE Sensors Journal, 16(14), pp.5563~5571 (2016)
- M. K. Kang, "CMOS IR-UWB Receiver for ± 9.7-mm Range Finding in a Multipath Environment", IEEE Transactions on Circuits and Systems II: Express Briefs, 59(9), pp.538~542 (2012)
- Vossiek, M, "Wireless local positioning", IEEE microwave magazine, 77(86), pp.77~86 (2003)
- P. Dudek, "A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line", IEEE Journal of Solid-State Circuits, 35(2), pp.240~247 (2000)
- R. A. Hastings, "The art of analog layout" (2006), Pearson
- B. Razavi, "Design of analog CMOS integrated circuits (International Edition)" (2001), John Wiley & Sons
- L. Vercesi, "Two-dimensions Vernier time-to-digital converter", IEEE Journal of Solid-State Circuits., 45(8), pp.1504~1512 (2010)
- T. H. Jin, "Time-of-Arrival Measurement Using Adaptive CMOS IR-UWB Range Finder with Scalable Resolution", IEEE Transactions on Circuits and Systems I: Regular Papers, 63(10), pp.1605~1615 (2016)
- M. J. M. Pelgrom, "Matching properties of MOS transistors", IEEE Journal of solid-state circuits., 24(5), pp.1433~1439 (1989)