Design Study of a 240-GHz Amplifier Frequency Doubler Chain Based on SiGe BiCMOS Technology
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In this work, an amplifier-frequency doubler chain has been designed in a 130-nm SiGe BiCMOS HBT technology operating around 240 GHz. The amplifier-frequency doubler chain is composed of a 240-GHz frequency doubler integrated with a 120-GHz driver amplifier. The differential driver amplifier exhibited a saturated output power of 10.8 dBm at the center frequency and a peak gain of 13.2 dB with a 23-GHz (109-132 GHz) 3-dB bandwidth. As for the frequency doubler, which is based on a push-push configuration, a saturated output power of 3.3 dBm and a peak output power of 1.8 dBm with a 3-dB bandwidth of 142 GHz (116-258 GHz) were obtained. After integration, the amplifier-frequency doubler chain showed a saturated output power of 3.3 dBm with a 3-dB bandwidth of 48 GHz (210-258 GHz). The total DC power consumption was 103.6 mW.
Abstract
In this work, an amplifier-frequency doubler chain has been designed in a 130-nm SiGe BiCMOS HBT technology operating around 240 GHz. The amplifier-frequency doubler chain is composed of a 240-GHz frequency doubler integrated with a 120-GHz driver amplifier. The differential driver amplifier exhibited a saturated output power of 10.8 dBm at the center frequency and a peak gain of 13.2 dB with a 23-GHz (109-132 GHz) 3-dB bandwidth. As for the frequency doubler, which is based on a push-push configuration, a saturated output power of 3.3 dBm and a peak output power of 1.8 dBm with a 3-dB bandwidth of 142 GHz (116-258 GHz) were obtained. After integration, the amplifier-frequency doubler chain showed a saturated output power of 3.3 dBm with a 3-dB bandwidth of 48 GHz (210-258 GHz). The total DC power consumption was 103.6 mW.
참고문헌 (10)
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