CNN Inference Accelerator Optimized for AI Applications for Object Detection
1
조회
0
다운로드
0
인용
0
참고문헌
키워드
초록
The advancement of state-of-the-art technology has dramatically impacted the field of Deep Neural Networks (DNNs), especially Convolutional Neural Networks (CNNs). As the demand for AI applications on mobile devices grows, power-hungry GPUs are no longer viable for mobile AI applications. Instead, there is a growing research trend towards compact and low power Neural Processing Units (NPUs) to solve current problems. This article presents an efficient architecture of a CNN inference accelerator that is optimized for AI applications on mobile devices. We propose two architectural enhancements and two optimization methods to improve the existing CNN accelerator [17]. To evaluate our work, we implemented it on a Zynq UltraScale+ MPSoC ZCU 102 Evaluation Board and verified it with the YOLOv5-nano model used for CNN object detection. Experimental results show that we reduced resource utilization by 7.31% for LUTs, 22.29% for FFs, and 3.90% for DSPs. In our Vivado simulation, we accelerated the inference time by 33.5%. With the reduced resource usage described above, we have implemented an accelerator with no loss of accuracy and better resource usage and speed.
Abstract
The advancement of state-of-the-art technology has dramatically impacted the field of Deep Neural Networks (DNNs), especially Convolutional Neural Networks (CNNs). As the demand for AI applications on mobile devices grows, power-hungry GPUs are no longer viable for mobile AI applications. Instead, there is a growing research trend towards compact and low power Neural Processing Units (NPUs) to solve current problems. This article presents an efficient architecture of a CNN inference accelerator that is optimized for AI applications on mobile devices. We propose two architectural enhancements and two optimization methods to improve the existing CNN accelerator [17]. To evaluate our work, we implemented it on a Zynq UltraScale+ MPSoC ZCU 102 Evaluation Board and verified it with the YOLOv5-nano model used for CNN object detection. Experimental results show that we reduced resource utilization by 7.31% for LUTs, 22.29% for FFs, and 3.90% for DSPs. In our Vivado simulation, we accelerated the inference time by 33.5%. With the reduced resource usage described above, we have implemented an accelerator with no loss of accuracy and better resource usage and speed.
참고문헌 (21)
- Alex Krizhevsky, "ImageNet classification with deep convolutional neural networks", Commun. ACM, 60(6), pp.84~90 (2017)[DOI]
- REDMON, Joseph, "You only look once : Unified, real-time object detection", Proceedings of the IEEE conference on computer vision and pattern recognition, pp.779~788 (2016)
- REN, Shaoqing, "Faster r-cnn: Towards real-time object detection with region proposal networks", Advances in neural information processing systems, 28 (2015)
- HUANG, Gao, "Densely connected convolutional networks", Proceedings of the IEEE conference on computer vision and pattern recognition, pp.4700~4708 (2017)
- LONG, Jonathan, "Fully convolutional networks for semantic segmentation", Proceedings of the IEEE conference on computer vision and pattern recognition, pp.3431~3440 (2015)
- CHEN, Liang-Chieh, "Deeplab : Semantic image segmentation with deep convolutional nets, atrous convolution, and fully connected crfs", IEEE transactions on pattern analysis and machine intelligence, 40(4), pp.834~848 (2017)
- CHEN, Matthew C., "Deep learning to classify radiology free-text reports", Radiology, 286(3), pp.845~852 (2018)
- HE, Kaiming, "Deep residual learning for image recognition", Proceedings of the IEEE conference on computer vision and pattern recognition, pp.770~778 (2016)
- SZEGEDY, Christian, "Inception-v4, inception-resnet and the impact of residual connections on learning", Proceedings of the AAAI conference on artificial intelligence (2017)
- KRIZHEVSKY, Alex, "Imagenet classification with deep convolutional neural networks", Advances in neural information processing systems, pp.25~ (2012)
- Y. Ma, "Optimizing the Convolution Operation to Accelerate Deep Neural Networks on FPGA", IEEE Transactions on Very Large Scale Integration(VLSI)Systems, 26(7), pp.1354~1367 (2018)[DOI]
- J. Li, "SmartShuttle : Optimizing off-chip memory accesses for deep learning accelerators", 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2018, pp.343~348 (2018)
- Dongyeong Lee, "High Speed CNN Accelerator SoC Design Based on Scalable Array", Master, pp.2023
- CHOI, Dahun, "Hardware-friendly log-scale quantization for CNNs with activation functions containing negative values", 2021 18th International SoC Design Conference (ISOCC), pp.415~416 (2021)
- Al-Hamid, A. A., "Unified Scaling-Based Pure-Integer Quantization for Low-Power Accelerator of Complex CNNs", Electronics, 12, pp.2660~ (2023)[DOI]
- Chen Zhang, "Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks", Proceedings of the 2015 ACM, 2015, 161~170[DOI]
- Y. Ma, "Performance Modeling for CNN Inference Accelerators on FPGA", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 39(4), pp.843~856 (2020)[DOI]