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A Low Power Mixed Signal Convolutional Neural Network for Deep Learning SoC

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초록

Convolutional Neural Networks (CNNs) are getting fame due to their simpler design and higher performance. However, CNNs suffer from a large area and power consumption constraints. The multiply-and-accumulate (MAC) unit, which performs the convolution operation inside a CNN, consumes a significant amount of power consumption. In this study, we propose a mixed-signal approach for implementing analog MAC unit that can replace the digital MAC unit in CNNs. The Analog MAC unit architecture is constituted from binary weighted current steering digital-to-analog (DAC) circuit and capacitors. A digital parallel interface is designed to provide input image and filter values to the MAC unit. To realize a complete CNN model a low-power analog-to-digital (ADC) is then employed at the output to convert the final value back to a digital value. When a 3×3 convolution is performed, the analog MAC unit offers a 10.7% reduction in area and a 59.2% reduction in power consumption compared to its fully digital counterparts.

Abstract

Convolutional Neural Networks (CNNs) are getting fame due to their simpler design and higher performance. However, CNNs suffer from a large area and power consumption constraints. The multiply-and-accumulate (MAC) unit, which performs the convolution operation inside a CNN, consumes a significant amount of power consumption. In this study, we propose a mixed-signal approach for implementing analog MAC unit that can replace the digital MAC unit in CNNs. The Analog MAC unit architecture is constituted from binary weighted current steering digital-to-analog (DAC) circuit and capacitors. A digital parallel interface is designed to provide input image and filter values to the MAC unit. To realize a complete CNN model a low-power analog-to-digital (ADC) is then employed at the output to convert the final value back to a digital value. When a 3×3 convolution is performed, the analog MAC unit offers a 10.7% reduction in area and a 59.2% reduction in power consumption compared to its fully digital counterparts.

참고문헌 (17)

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