Green-Power 스위치와 DT-CMOS Error Amplifier를 이용한 DC-DC Converter 설계
The Design of DC-DC Converter with Green-Power Switch and DT-CMOS Error Amplifier
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The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency
Abstract
The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency
참고문헌 (8)
- 김희준, "스위치 모드 파워 서플라이" (1993), 성인당
- Baker, "CMOS Circuit Design and layout" (2005), Wiley
- Chris Toumazou, "Trade-Offs in analog Circuit Design", pp.139~204 (2004), Springer
- Fariborz Assaderaghi, "A Dynamic Threshold Voltage MOSFET(DTMOS)for Very-Low Voltage Operation", IEEE Electron device letters, 15(12), pp.510~512 (1994)
- K.Mark Smith,Jr., "A Comparison of Voltage-Mode Soft-Switching Methods for PWM Converters", IEEE Trans.Power Electronics, 12(2), pp.376~386 (1997)
- Atsuo Fukui, "Design Consideration for a 2 MHz Synchronous Buck Converter in CMOS", ISPSD 2004, 71~74 (2004)
- A.Djemouai, "New CMOS Integrated Pulse Width Modulator for Voltage Conversion Applications", ICECS 2000, 1, pp.116~119 (2000)
- Lu Chen, "Design and Test of a Synchronous PWM Switching Regulator System", IEEE APCCAS 2000, pp.517~520 (2000)