깊은 준위 결함에 의한 SiC SBD 전기적 특성에 대한 영향 분석
The effect of deep level defects in SiC on the electrical characteristics of Schottky barrier diode structures
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초록
SiC는 차세대 전력반도체의 핵심 재료로 넓은 밴드갭과 높은 절연파괴강도, 열전도율을 가지고 있지만 deep level defect와 같은 다양한 문제를 야기하는 결함이 존재한다. SiC에서 나타나는 defect는 물성에서 나타나는 defect와 계면에서 나타나는interface trap 2가지로 나뉜다. 본 논문은 상온 (300 K)에서 보고되는 Z1/2 trap concentration 0 ∼ 9×1014 cm-3을 SiC substrate와 epi layer에 적용하여 turn-on 특성을 알아보고자 한다. 전류밀도와 SRH(Shockley-Read-Hall), Auger recombination을 통해 구조 내 재 결합률을 확인하였다. trap concentration이 증가할수록 turn-on시 전류밀도와 재 결합률은 감소하며 Ron은0.004에서 0.022 mΩ으로 약 550% 증가하였다.
Abstract
SiC is a power semiconductor with a wide bandgap, high insulation failure strength, and thermal conductivity,but many deep-level defects. Defects that appear in SiC can be divided into two categories, defects that appear inphysical properties and interface traps that appear at interfaces. In this paper, Z1/2 trap concentration 0 ∼ 9×1014cm-3 reported at room temperature (300 K) is applied to SiC substrates and epi layer to investigate turn-oncharacteristics. As the trap concentration increased, the current density, Shockley-read-Hall (SRH), and Augerrecombination decreased, and Ron increased by about 550% from 0.004 to 0.022 mohm.
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