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용량형 지문인식센서를 위한 전하분할 방식 감지회로의 CMOS 구현

A CMOS integrated circuit design of charge-sharing scheme for a capacitive fingerprint sensor

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초록

Abstract

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of 160 x 192 array sensing cells (12 by 12.7 mm2). The chip was fabricated on a 0.35m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95V.

참고문헌 (4)

  1. J. W. Lee,D. J. Min,J. Y. Kim,and W. C. Kim, "A 600-dpi Capacitive Fingerprint Sensor Chip and Image-Synthesis Technique IEEE J. of Solid-state Circuits", (469475) (1999), No. 4
  2. M. Tartagni, "A Fingerprint Sensor Based on the Feedback Capacitive Sensing Scheme", 33, pp.133~142
  3. D. Inglis et al, "A Robust 1.8 V 250 usW Direct-Contact 500 dpi Fingerprint Sensor", pp.284~285 (1998)
  4. H. Morimura,S. Shigematsu,and K. Machida, "A Novel Sensor Cell Architecture and Sensing CircuitScheme for Capacitive Fingerprin Sensors", ieee j. of solid-state circuits(35), pp.724~731

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