본문 바로가기
KERD
논문KCI 등재

하드웨어 마스킹 대응기법에 대한 고차 차분부채널분석 공격

High-Order Differential Side Channel Analysis Attacks on Masked Hardware Implementations

0

조회

0

다운로드

0

인용

0

참고문헌

주제분류컴퓨터학

초록

본 논문에서는 기존에 제시된 다양한 고차 차분부채널분석 공격기법에 대해 살펴본다. 하드웨어로 구현된 마스킹 기법에서 두 개의 마스킹된 중간 값이 병렬로 처리되는 경우 기존의 공격기법에 문제가 있음을 실험적으로 보이고, 이를 해결하기 위해 효율적이며 간단한 사전처리함수를 제안한다. 제안된 사전처리함수를 이용한 2차 DPA 공격과 DEMA 공격 결과, 마스킹 대응기법에 대한 2차 차분부채널분석 공격이 매우 위협적인 공격임을 실험적으로 검증할 수 있었다.

Abstract

In this paper, we investigate the several different types of higher-order differential side channel analysis (DSCA) attacks. We present that some of exiting higher-order DSCA attacks have some practical problem applying to two masked intermediate values being parallel processed. In order to solve this problem we propose a new higher-order DSCA attack using an efficient and simple preprocessing function. Using the proposed preprocessing function we clearly show that 2nd-order DSCA attacks are still a practical threat for masked hardware implementations.

참고문헌 (26)

  1. P. Kocher, "Differential Power Analysis", pp.388~397 (1999), Springer-Verlag
  2. H. Yoo, "Investigations of Power Analysis Attacks and Countermeasures for ARIA" (2007), Springer-Verlag
  3. F. Standaert, "Power Analysis of an FPGA Implementation of Rijndael: Is Pipelining a DPA Countermeasure ?", pp.30~44 (2004), Springer- erlag
  4. F. Gurkaynak, "Power-Analysis Attack on an ASIC AES Implementation ?", 2, pp.546~553 (2004)
  5. M. L. Akkar, "An Implementation of DES and AES, Secure against Some Attacks", 2162, pp.309~318 (2001), Springer-Verlag
  6. J. D. Golic, "Multiplicative masking and power analysis of AES", 2523, pp.198~212 (2002), Springer- erlag
  7. T. S. Messerges, "Securing the AES finalists against power analysis attacks", pp.150~164 (2000), Springer-Verlag
  8. E. Trichina, "Simplified adaptive multiplicative masking for AES", pp.187~197 (2003), Springer-Verlag
  9. J. Blomer, "Provably secure masking of AES?", pp.69~83 (2004), Springer-Verlag
  10. E. Oswald, "A side-channel analysis resistant description of the AES S-box ?", pp.413~423 (2005), Springer- erlag
  11. C. Clavier, "Differential power analysis in the presence of hardware countermeasures", pp.252~263 (2000), Springer-Verlag
  12. K. Tiri, "A dynamic and differential CMOS logic with signal independent power consumption to withstand differential power analysis on smart cards" (2002)
  13. K. Tiri, "A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation,", pp.246~251 (2004)
  14. T. Popp, "Masked dual-rail pre-charge logic : DPA resistance without routing constraints,?", pp.157~171 (2005), Springer-Verlag
  15. S. Chari, "Towards Sound Approaches to Counteract Power-Analysis Attacks?", pp.398~412 (1999), Springer-Verlag
  16. T. Messerges, "Using Second-Order Power Analysis to Attack DPA Resistant Software", pp.238~251 (2004), Springer- Verlag
  17. J. Waddle, "Towards Efficient Second-Order Power Analysis", pp.1~15 (2004), Springer-Verlag
  18. M. Joye, "On Second-Order Differential Power Analysis", pp.293~308 (2005), Springer- Verlag
  19. E. Peeters, "Improved Higher Order Side- Channel Attacks with FPGA Experiments,?", pp.309~323 (2005), Springer-Verlag
  20. F.X. Standaert, "On the Masking Countermeasure and Higher- Order Power Analysis Attacks", 1, pp.562~567 (2005)
  21. E. Oswald, "Practical Second-Order DPA Attacks for Masked Smart Card Implementations of Block Ciphers,", pp.192~207 (2006), Springer-Verlag
  22. T. Messerges, "Method and appara- tus for preventing information leakage attacks on a microelectronic assembly,?"
  23. E. Trichina, "Combinational logic design for AES subbyte transformation on masked data" (2003)
  24. "?Higher order masking of the AES ? In CT-RSA2006", 3860, pp.208~225 (2006), K. Schramm and C. Paar Springer-Verlag
  25. P. Kocher, "Differential Power Analysis", pp.388~397 (1999), Springer-Verlag
  26. S. Mangard, "Hardware Counter-measures against DPA-A Statistical Analysis of Their Effectiveness", pp.222~235 (2004), Springer-Verlag

관련 논문AI추천

이 간행물의 다른 논문 (5건)