Image Preprocessing using Systolic Arrays
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This paper proposed a systolic array architecture for computing image preprocessing. It is very difficult to be processed images to real time because of operations of local operators. Local operators for computing image preprocessing are used in many image processing tasks, involve replacing each pixel in an image with a valve computed within a local neighborhood of that pixel. Computing such operators at the video rate requires a computing power which is not provided with software method by conventional computer. In this paper, we improved these problem by using systolic arrays. Once the data has been fetched from memory, it was used a lot of times in inside computer system. As a result, image data fetched from memory were used in each cell in CPU many times before it was return to main memory. There, we were able to obtain high throughput with the usual memory bandwidth. A architecture for processing of image preprocessing consisted of one dimensional systolic arrays. A cell has three mask value for image preprocessing. Each cell is executed in parallel at the same time. We had simulated its architecture, and not only achieve good results but also reduce processing time.
Abstract
This paper proposed a systolic array architecture for computing image preprocessing. It is very difficult to be processed images to real time because of operations of local operators. Local operators for computing image preprocessing are used in many image processing tasks, involve replacing each pixel in an image with a valve computed within a local neighborhood of that pixel. Computing such operators at the video rate requires a computing power which is not provided with software method by conventional computer. In this paper, we improved these problem by using systolic arrays. Once the data has been fetched from memory, it was used a lot of times in inside computer system. As a result, image data fetched from memory were used in each cell in CPU many times before it was return to main memory. There, we were able to obtain high throughput with the usual memory bandwidth. A architecture for processing of image preprocessing consisted of one dimensional systolic arrays. A cell has three mask value for image preprocessing. Each cell is executed in parallel at the same time. We had simulated its architecture, and not only achieve good results but also reduce processing time.
참고문헌 (18)
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