픽셀의 고정 패턴 잡음을 감소시킨 윤곽 검출용 시각칩
Vision chip for edge detection with a function of pixel FPN reduction
1
조회
0
다운로드
2
인용
0
참고문헌
초록
Abstract
When fabricating a vision chip, we should consider the noise problem, such as the fixed pattern noise(FPN) due to the process variation. In this paper, we propose an edge-detection circuit based on biological retina using the offset-free column readout circuit to reduce the FPN occurring in the photo-detector. The offset-free column readout circuit consists of one source follower, one capacitor and five transmission gates. As a result, it is simpler and smaller than a general correlated double sampling(CDS) circuit. A vision chip for edge detection has been designed and fabricated using 0.35m 2-poly 4-metal CMOS technology, and its output characteristics have been investigated.
참고문헌 (11)
- "Vision Chips or Seeing Silicon" (1997), CHiPTec
- "and E. R. Fossum CMOS active pixel image sensors for highly integrated imaging systems", pp.187~197
- "A new structure of the 2-D silicon retina", 30, pp.890~897
- "Analog integrated circuits for edge detection with local adaptation", pp. 65-66, pp.1999~
- "Design and fabrication of 88 foveated CMOS retina chip for edge detection", 10, pp.91~100 (2001)
- "and J. K. Shin Design and fabrication of 3232 foveated CMOS retina chip for edge detection with local-light adaptation", pp.84~92 (2002)
- "Hardware for biologically inspired vision processing" (1997)
- "Matching properties of MOS transistors", 24(5), pp.1433~1440 (1989)
- "A MOS switched-capacitor instrumentation amplifier", 17(6), pp.1008 1982~1013
- "Offset-free column readout circuit for CMOS image sensors", 35(24), pp.2112~2113 (1999)
- "A novel retina chip with simple wiring for edge extraction", (2), pp.261~263 (1998)