Probabilistic Soft Error Detection Based on Anomaly Speculation
1
조회
0
다운로드
0
인용
0
참고문헌
키워드
초록
Microprocessors are becoming increasingly vulnerable to soft errors due to the current trends of semiconductor technology scaling. Traditional redundant multi-threading architectures provide perfect fault tolerance by re-executing all the computations. However, such a full re-execution technique significantly increases the verification workload on the processor resources, resulting in severe performance degradation. This paper presents a pro-active verification management approach to mitigate the verification workload to increase its performance with a minimal effect on overall reliability. An anomaly-speculation-based filter checker is proposed to guide a verification priority before the re-execution process starts. This technique is accomplished by exploiting a value similarity property, which is defined by a frequent occurrence of partially identical values. Based on the biased distribution of similarity distance measure, this paper investigates further application to exploit similar values for soft error tolerance with anomaly speculation. Extensive measurements prove that the majority of instructions produce values, which are different from the previous result value, only in a few bits. Experimental results show that the proposed scheme accelerates the processor to be 180% faster than traditional fully-fault-tolerant processor with a minimal impact on overall soft error rate.
Abstract
Microprocessors are becoming increasingly vulnerable to soft errors due to the current trends of semiconductor technology scaling. Traditional redundant multi-threading architectures provide perfect fault tolerance by re-executing all the computations. However, such a full re-execution technique significantly increases the verification workload on the processor resources, resulting in severe performance degradation. This paper presents a pro-active verification management approach to mitigate the verification workload to increase its performance with a minimal effect on overall reliability. An anomaly-speculation-based filter checker is proposed to guide a verification priority before the re-execution process starts. This technique is accomplished by exploiting a value similarity property, which is defined by a frequent occurrence of partially identical values. Based on the biased distribution of similarity distance measure, this paper investigates further application to exploit similar values for soft error tolerance with anomaly speculation. Extensive measurements prove that the majority of instructions produce values, which are different from the previous result value, only in a few bits. Experimental results show that the proposed scheme accelerates the processor to be 180% faster than traditional fully-fault-tolerant processor with a minimal impact on overall soft error rate.
참고문헌 (22)
- T.M.Austin, "DIVA: A reliable substrate for deep submicron microarchitecture design", Proceedings of the 32nd International Symposium on Microarchitecture (1999)
- D. Brooks, "Dynamically exploiting narrow width operands to improve processorpower and performance", Proceedings of the 5th International Symposium on High Performance Computer Architecture (1999)
- T. M. Cover, "Elements of Information Theory" (1991), John Wiley and Sons
- M. A. Gomaa, "Opportunistic transient fault detection", Proceedings of the 32nd International Symposium on Computer Architecture (2005)
- R. Gonzalez, "A content aware integer register file organization", Proceedings of the 31st International Symposium on Computer Architecture (2004)
- J. L. Hennessy, "Computer Architecture: A Quantitative Approach" (2003), Morgan Kaufmann
- I. P. Hong, "Physical register sharing through value similarity detection", IEICE Transactions on Information and Systems, E89-D (2006)
- J. Hu, "In-register duplication: Exploiting narrow-width value for improving register file reliability", Proceedings of the 2006 International Conference on Dependable Systems and Networks (2006)
- S. Kumar, "Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors", Proceedings of the 12th International Symposium on High-Performance Computer Architecture (2006)
- M. H. Lipasti, "Exceeding dataflow limit via value prediction", Proceedings of the 29th International Symposium on Microarchitecture (1996)
- S. S. Mukherjee, "Detailed design and evaluation of redundant multithreading alternatives", Proceedings of the 29th International Symposium on Computer Architecture (2002)
- S. S. Mukherjee, "A systematic methodology to compute the architectural vulnerability factors for a high-performance microprocessor", Proceedings of the 36th International Symposium on Microarchitecture (2003)
- J. Ray, "Dual use of superscalar datapath for transient-fault detection and recovery", Proceedings of the 34th International Symposium on Microarchitecture (2001)
- S.K.Reinhardt, "Using the M5 Simulator", ISCA tutorials and workshops, University of Michigan (2005)
- S. K. Reinhardt, "Transient fault detection via simultaneous multithreading", Proceedings of the 27th International Symposium on Computer Architecture (2000)
- E.Rotenberg, "AR-SMT:A microarchitectural approach to fault tolerance in microprocessors", Proceedings of the 29th International Symposium on Fault-Tolerant Computing (1999)
- K. Skadron, "Temparature-aware microarchitecture", Proceedings of the 30th International Symposium on Computer Architecture (2003)
- A. Sodani, "Understanding the differences between value prediction and instruction reuse", Proceedings of the 31st International Symposium on Microarchitecture (1998)
- K. Sundaramoorthy, "Slipstream processors:Improving both performance and fault tolerance", Proceedings of the 33rd International Symposium on Microarchitecture (2000)
- T. N. Vijaykumar, "Transient-fault recovery using simultaneous multithreading", Proceedings of the 29th International Symposium on Computer Architecture (2002)
- N. J. Wang, "Restore:Symptom based soft error detection in microprocessors", Proceedings of the International Conference on Dependable Systems and Networks (2005)
- J. Yoo, "Hierarchical Verification for Increasing Performance in Reliable Processors", Journal of Electronic Testing: Theory and Applications, 24(1) (2008), Springer