전기도금법을 이용하여 형성한 Au-Sn 플립칩 접속부의 미세구조 및 접속저항
Microstructure and Contact Resistance of the Au-Sn Flip-Chip Joints Processed by Electrodeposition
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초록
Au와 Sn을 순차적으로 도금한 Au/Sn 범프를 플립칩 본딩하여 Au-Sn 솔더 접속부를 형성 후, 미세구조와 접속저항을 분석하였다. 285oC에서 30초간 플립칩 본딩한 Au-Sn 솔더 접속부는 Au5Sn+AuSn lamellar 구조로 이루어져 있으며, 이 시편을 310oC에서 3분간 유지하여 2차 리플로우시 Au5Sn+AuSn interlamellar spacing이 증가하였다. 285oC에서 30초간 플립칩 본딩한 Au-Sn 접속부는 15.6 mΩ/bump의 평균 접속저항을 나타내었으며, 이 시편을 다시 310oC에서 3분간 유지하여 2차 리플로우 한 Au-Sn 접속부는 15.0 mΩ/bump의 평균 접속저항을 나타내었다.
Abstract
Microstructure and contact resistance of the Au-Sn solder joints were characterized after flipchip bonding of the Au/Sn bumps processed by successive electrodeposition of Au and Sn. Microstructure of the Au-Sn solder joints, formed by flip-chip bonding at 285oC for 30 sec, was composed of the Au5Sn+AuSn lamellar structure. The interlamellar spacing of the Au5Sn+AuSn structure increased by reflowing at 310oC for 3 min after flip-chip bonding. While the Au-Sn solder joints formed by flip-chip bonding at 285oC for 30 sec exhibited an average contact resistance of 15.6 mΩ/bump, the Au-Sn solder joints reflowed at 310oC for 3 min after flip-chip bonding possessed an average contact resistance of 15.0 mΩ/bump,
참고문헌 (20)
- W. Sun, "Development of an electroplating solution for codepositing Au-Sn alloys", Mater. Sci. Eng, B65, pp.111~122 (1999)
- J. W. Yoon, "Reliability evaluation of Au-20Sn flip chip solder bump fabricated by sequential electroplating method with Sn and Au", Mater. Sci. Eng, A473, pp.119~125 (2008)
- J. Doesburg, "Microstructure and preferred orientation of Au-Sn alloy plated deposits", Mater. Sci. Eng, B78, pp.44~52 (2000)
- D. Kim, "Fluxless flip-chip Sn-Au solder interconnect on thin Si wafers and Cu laminated polyimide films", Mater. Sci. Eng, A416, pp.74~79 (2006)
- G. Elger, "Development of a low cost wafer level flip chip assembly process for high brightness LEDs using the AuSn metallurgy", IMAPS: Int. Symp. Microelectron., pp.199~204 (2002)
- P. P. Maaskant, "LED flip-chip assembly with electroplated AuSn alloy", Phys. Sat. Sol, 2, pp.2907~2911 (2005)
- W. Pittroff, "Mounting of high power laser diodes on boron nitride heat sinks using an optimized Au", Sn metallurgy, 2001, pp.24, 434~441
- D. A. Zakheim, "High-power flip-chip blue light-emitting diodes bas on AlGa-In N", Phys. Stat. Sol, 1, pp.2401~2404 (2004)
- Y. Zhu, "Enhanced output of flip-chip light-emitting diodes with a sidewall reflector", Solid-State Electronics, 51, pp.674~677 (2007)
- C. C. Kao, "Light-output enhancement in a nitride-based light-emitting diode with 22o undercut sidewall", IEEE Photon Technol. Lett, 17, pp.19~21 (2005)
- J. K. Kim, "GaInN light-emitting diodes with RuO2", SiO2, Appl. Phys. Lett, pp.2004, 84[DOI]
- "www.allmeasures.com"[URL]
- "www.allmeasures.com"[URL]
- W . Tang, "Room temperature interfacial reactions in electrodeposited Au", Sn couples, 2003, pp.56, 5818~5827
- L. Buene, "Room temperature interdiffusion in evaporated Au-Sn films", Phys. Scripta, 18, pp.397~399 (1978)
- D. K. Schroder, "Semiconductor material and device characterization", pp.10~ (1998), John Wiley & Sons, Inc.
- C. Y. Yin, "The effect of reflow process on the contact resistance and reliability of anisotropic conductive film interconnection for flip chip on flex applications", Microelectron. Reliab, 43, pp.625~633 (2003)
- M. A. Uddin, "Adhesion strength and contact resistance of flip chip on flex packages-effect of curing degree of anisotropic conductive film", Microelectron. Reliab, 44, pp.510~514 (2004)
- E. Nicewarner, "Interconnect resistance characteristics of several flip-chip bumping and assembly techniques", Microelectron. Reliab, 39, pp.113~121 (1999)
- 정부양, "Electrodeposition 변수에 따른 Sn 도금의 표면 거칠기와 플립칩 접속된 Sn 범프의 접속저항", 마이크전자 및 패키징학회지, 13(4), pp.37~44 (2006), 한국마이크로전자및패키징학회
