Cu Pillar 플립칩 접속부의 열 싸이클링 및 고온유지 신뢰성
Thermal Cycling and High Temperature Storage Reliabilities of the Flip Chip Joints Processed Using Cu Pillar Bumps
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초록
Cu pillar 범프와 Sn 패드로 구성된 플립칩 접속부를 형성한 후, Sn 패드의 높이에 따른 Cu pillar 플립칩 접속부의 열 싸이클링 및 고온유지 신뢰성을 분석하였다. Cu pillar 플립칩 접속부를 구성하는 Sn 패드의 높이가 5 μm에서30 μm로 증가함에 따라 접속저항이 31.7 mΩ에서 13.8 mΩ로 감소하였다. -45oC~125oC 범위의 열 싸이클을 1000회 인가한 후에도 Cu pillar 플립칩 접속부의 접속저항의 증가가 12% 이하로 유지되었으며, 열 싸이클링 시험전과 거의 유사한 파괴 전단력을 나타내었다. 125oC에서 1000 시간 유지시에도 Cu pillar 플립칩 접속부의 접속저항의 증가가 20% 이하로 유지되었다.
Abstract
For the flip chip joints processed using Cu pillar bumps and Sn pads, thermal cycling and high temperature storage reliabilities were examined as a function of the Sn pad height. With increasing the height of the Sn pad, which composed of the flip chip joint, from 5 μm to 30 μm, the contact resistance of the flip chip joint decreased from 31.7 mΩto 13.8 mΩ. Even after thermal cycles of 1000 times ranging from -45oC to 125oC, the Cu pillar flip chip joints exhibited the contact resistance increment below 12% and the shear failure forces similar to those before the thermal cycling test. The contact resistance increment of the Cu pillar flip chip joints was maintained below 20% after 1000 hours storage at 125oC.
참고문헌 (20)
- 최정열, "Cu pillar 범프의 Cu-Sn-Cu 샌드위치 접속구조를 이용한 플립칩 공정", 마이크로전자 및 패키징학회지, 16(4), pp.9~15 (2009), 한국마이크로전자및패키징학회
- J. H. Choi, "Contact Resistance of the Chip-on-glass Bonded 48Sn-52In Solder Joint", Mater. Trans, 46, pp.1042~1046 (2005)
- J. W. Wan, "Recent Advances in Modeling the Underfill Process in Flip-chip Packaging", Microelectron. J., 38(1), pp.67~ (2007)
- T. Braun, "High-temperature Reliability of Flip Chip Assemblies", Microelectron. Reliab., 46(1), pp.144~ (2006)
- K. N. Tu, "Under Bump Metallurgy Study for Pb-free Bumping", Mater. Sci. Eng., 34, pp.1~ (2001)
- J. H. Lau, "Low Cost Flip Chip Technologies", pp.511~ (2000), McGraw-Hill
- J. H. Lau, "Low Cost Flip Chip Technologies", pp.183~ (2000), McGraw-Hill
- B. Banijamali, "Crack Growth- Resistant Interconnects for High-Reliability Microelectronics", 57th Electron. Comp. Technol. Conf. (2008), IEEE Components, Packaging and Manufacturing Technology Society (CPMT)
- A. Keigler, "Pattern Effects on Electroplated Copper Pillars", Inter. Wafer-level Packag. Conf. (2006)
- G. T. Lim, "Temperature Effect on Intermetallic Compound Growth Kinetics of Cu Pillar", Sn Bumps, 2009, pp.38(11), 2228~
- T. Wang, "Studies on a Novel Flip-Chip Interconnect Structure-Pillar Bump", Proc. Electron. Comp. Technol. Conf., pp.945~949 (2001)
- 최정열, "Cu 범프와 Sn 범프의 접속구조를 이용한 RF 패키지용 플립칩 공정", 마이크로전자 및 패키징학회지, 16(3), pp.67~73 (2009), 한국마이크로전자및패키징학회
- Li-Rong Zheng, "Cost and Performance Trade-off Analysis in Radio and Mixed-Signal System-on-Package Design", IEEE Trans. Adv. Packag., 27(2), pp.364~ (2004)
- A. Chandrasekhar, "Accurate RF Electrical Characterization of CSPs Using MCM-D Thin Film Technology", IEEE Trans. Adv. Packag., 27(1), pp.203~ (2004)
- E. Beyne, "Multilayer Thin-Film Technology Enabling Technology for Solving High-Density Interconnect and Assembly Problems", Nuclear Inst. Methods Phys. Res. A, 509(1), pp.191~ (2003)
- K. M. Chen, "Copper Pillar Bump Design Optimization for Lead Free Flip-Chip Packaging", J. Mater. Sci. Mater. Electron., 21(3), pp.278~ (2009)
- C. W. Tan, "Effect of Autoclave Test on Anisotropic Conductive Joints", Microelectron. Reliab., 43(2), pp.279~ (2003)
- J. H. Zhang, "Contact Resistance and Adhesion Performance of ACF Interconnections to Aluminum Metallization", Microelectron. Reliab., 43(8), pp.1303~ (2003)
- Y. T. Hsieh, "Reliability and Failure Mode of Chip-on-film with Non-conductive Adhesive", Proc. 4th Int. Symp. Electron. Mater. Packag. (EMAP), pp.157~ (2002), IEEE Component, Packaging & Manufacturing Technology
- 임기태, "Cu pillar 범프의 금속간화합물 성장과 계면접착에너지에 관한 연구", 마이크로전자 및 패키징학회지, 15(4), pp.17~24 (2008), 한국마이크로전자및패키징학회