새로운 구조의 구조의 ESD 보호소자를 내장한 고속-저 전압 LVDS 드라이버 설계에 관한 연구
A Study on The Design of High Speed-Low Voltage LVDS Driver Circuit with Novel ESD Protection Device
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Abstract
In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low signal swing range, maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps.And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V.Finally, The high speed I/O interface circuit with the low triggered ESD protection device in one-chip was designed.
참고문헌 (7)
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