페어링 기반 암호시스템의 효율적인 유한체 연산기
Efficient Finite Field Arithmetic Architectures for Pairing Based Cryptosystems
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초록
페어링 기반의 암호시스템의 효율성은 페어링 연산의 효율성에 기반하며 페어링 연산은 유한체 GF(3m)에서 많이 고려된다. 또한 페어링의 고속연산을 위하여 삼항 기약다항식을 고려하며 이를 기반으로 하는 하드웨어 설계방법에 대한 연구가 활발히 진행되고 있다. 본 논문에서는 기존의 GF(3) 연산보다 효율적인 새로운 GF(3) 덧셈 및 곱셈 방법을 제안하며 이를 기반으로 새로운 GF(3^m) 덧셈-뺄셈 unified 연산기를 제안한다. 또한 삼항 기약다항식을 특징을 이용한 새로운 GF((p^m) MSB-first 비트-직렬 곱셈기를 제안한다. 제안하는 MSB-first 비트-직렬 곱셈기는 기존의 MSB-first 비트-직렬 곱셈기보다 시간지연이 대략 30%감소하며 기존의 LSB-first 비트-직렬 곱셈기보다 절반의 레지스터를 사용하여 효율적이며, 제안하는 곱셈 방법은 삼항 기약다항식을 사용하는 모든 유한체에 적용가능하다.
Abstract
The efficiency of pairing based cryptosystems depends on the computation of pairings. pairings is defined over finite fileds GF(3^m) by trinomials due to efficiency. The hardware architectures for pairings have been widely studied. This paper proposes new adder and multiplier for GF(3) which are more efficient than previous results. Furthermore, this paper proposes a new unified adder-subtractor for GF(3^m) based on the proposed adder and multiplier. Finally, this paper proposes new multiplier for GF(3^m). The proposed MSB-first bit-serial multiplier for GF(p^m) reduces the time delay by approximately 30 % and the size of register by half than previous LSB-first multipliers. The proposed multiplier can be applied to all finite fields defined by trinomials.
참고문헌 (15)
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