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입출력 형태에 따른 다중처리기 시스템의 성능 분석

An Analysis of Multi-processor System Performance Depending onthe Input/Output Types

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초록

This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

Abstract

This study proposes a performance model of a shared bus multi-processor system and analyzes the effect of input/output types on system performance and overload of shared resources. This system performance model reflects the memory reference time in relation to the effect of input/output types on shared resources and the input/output processing time in relation to the input/output processor, disk buffer, and device standby places. In addition, it demonstrates the contribution of input/output types to system performance for comprehensive analysis of system performance. As the concept of workload in the probability theory and the presented model are utilized, the result of operating and analyzing the model in various conditions of processor capability, cache miss ratio, page fault ratio, disk buffer hit ratio (input/output processor and controller), memory access time, and input/output block size. A simulation is conducted to verify the analysis result.

참고문헌 (9)

  1. Wen-Tsuen Chen, "Performance Analysis of Multiple Bus Interconnection Networks with Hierarchical Requesting Model", IEEE Trans. on Computer, 50(7), pp.834~842
  2. Men-Chow Chiang, "Experience with Mean Value Analysis Models for Evaluating Shared Bus, Throughput-Oriented Multiprocessors", Performance Evaluating Review, 19, pp.90~102 (2003)
  3. J. L. Grino, "Analysis and Simulation of Multiplexed Single-Bus Networks with and without Buffering", Proc. of Symposium on Computer Architeture, pp.414~421 (1995)
  4. Qing Yang, "Analysis of Packet-Switched Multiple-Bus Multiproessor Systems", IEEE Trans. on Computer, 50, pp.352~357 (2001)
  5. Janaki Akella, "Modeling and Measurement of the Impact of Input and Output on System Performance", Proc. of Symposium on Computer Architecture, pp.390~399 (2005)
  6. Men-Chow Chiang, "Evaluating Design Choices for Shared Bus Multiprocessors in a Throughput-Oriented Environment", IEEE Trans. on Computer, 51(3), pp.297~317
  7. Per Stenstrom, "A Survey of Cache Coherence Schemes for Multiprocessors", IEEE Computer, pp.12~24 (2000)
  8. 장범환, "트래픽 세션의 포트 역할을 이용한 네트워크 공격 시각화", (사)디지털산업정보학회 논문지, 11(4), pp.47~60 (2015), (사)디지털산업정보학회[DOI]
  9. 양환석, "Mobile Ad-hoc Network에서 영역기반 보안 멀티캐스트 기법 연구", (사)디지털산업정보학회 논문지, 12(3), pp.75~85 (2016), (사)디지털산업정보학회[DOI]

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