뉴로모픽 시스템을 위한 실리콘 기반의 STDP 펄스 발생 회로
Silicon Based STDP Pulse Generator for Neuromorphic Systems
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초록
A new CMOS neuron circuit for implementing bistable synapses with spike-timing-dependent plasticity (STDP) properties has been proposed. In neuromorphic systems using STDP properties, the short-term dynamics of the synaptic efficacies are governed by the rel-ative timing of the pre- and post-synaptic spikes, and the efficacies tend asymptotically to either a potentiated state or to a depressedone on long time scales. The proposed circuit consists of a negative shifter, a current starved inverter and a schmitt trigger designed using0.18um CMOS technology. The simulation result shows that the proposed circuit can reduce the total size of neurons, and the spike energy of the proposed circuit is much less compared to the conventional circuits.
Abstract
A new CMOS neuron circuit for implementing bistable synapses with spike-timing-dependent plasticity (STDP) properties has been proposed. In neuromorphic systems using STDP properties, the short-term dynamics of the synaptic efficacies are governed by the rel-ative timing of the pre- and post-synaptic spikes, and the efficacies tend asymptotically to either a potentiated state or to a depressedone on long time scales. The proposed circuit consists of a negative shifter, a current starved inverter and a schmitt trigger designed using0.18um CMOS technology. The simulation result shows that the proposed circuit can reduce the total size of neurons, and the spike energy of the proposed circuit is much less compared to the conventional circuits.
참고문헌 (8)
- B.H. Calhoun, "Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits", IEEE J. Solid-State Circuits, 40(9), pp.1778~1786 (2005)[DOI]
- S. Brady, "Basic Neurochemistry: Molecular, Cellular and Medical Aspects" (2005), Elsevier Academic Press
- B. Liu, "Digital-assisted noise eliminating training for memristor crossbar-based analog neuromorphic computing engine", Proc. Des. Autom. Conf., pp.1~6 (2013)
- K. Kim, "A functional hybrid memristor crossbar-array", CMOS system for data storage and neuromorphic applications, 2011, pp.12(1), 389~395
- Y. Dan, "Review- Spike Timing-Dependent Plasticity of Neural Circuits", Neuron, 44(1), pp.23~30 (2004)[DOI]
- G. Indiveri, "Neuromorphic silicon neuron circuits", Front. Neurosci. (2011)
- J. N Healy, "A leaky integrate-and-fire neuron with adjustable refractory period and spike frequency adaptation", pp.2017
- E. Chicca, "Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems", Proc. IEEE Inst. Electr. Electro. Eng., 102(9) (2014)