FPGA를 이용한 실시간 영상 워핑 구현
An Implementation of Real-time Image Warping Using FPGA
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참고문헌
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초록
As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.
Abstract
As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.
참고문헌 (16)
- 이상문, "ARM 및 FPGA를 이용한 고속 레이저 삼각측량 시스템", 대한임베디드공학회논문지, 8(1), pp.25~29 (2013), 대한임베디드공학회
- J. Park, "Lens distortion correction using ideal image coordinates", IEEE Transactions on Consumer Electronics, 55(3), pp.987~991 (2009)
- Z. Chen, "A new image rectification algorithm", Pattern Recognition Letters, 24(1-3), pp.251~ (2003)
- M. Brown, "Automatic panoramic image stitching using invariant features", International Journal of Computer Vision, 74(1), pp.59~73 (2007)
- W. Yu, "An embedded camera lens distortion correction method for mobile computing applications", IEEE Transactions on Consumer Electronics, 49(4), pp.894~901 (2003)
- K. T. Gribbon, "A real-time FPGA implementation of a barrel distortion correction algorithm with bilinear interpolation", Proc. of the Image and Vision Computing New Zealand 2003, pp.408~413 (2003)
- C. Vancea, "LUT-based image rectification module implemented in FPGA", Proceedings of IEEE International Conference on Intelligent Computer Communication and Processing, pp.147~154 (2007)
- S. Oh, "FPGA-based fast image warping with data-parallelization schemes", IEEE Transactions on Consumer Electronics, 54(4), pp.2053~2059 (2008)
- A. Serguienko, "Evaluation of image warping algorithms for implementation in FPGA", 석사, pp.2008
- P. Greisen, "An FPGA-based processing pipeline for high-definition stereo video", Journal of Image and Video Processing, 2011(18), pp.1~13 (2011)
- P. Giacon, "Implementing DSP Algorithms Using Spartan-3 FPGAs", DPS Magazine, 1, pp.16~19 (2005)
- 김동진, "삼중 버퍼링 방법을 이용한 실시간 소나 신호 디스플레이를 위한 FPGA 임베디드 시스템의 구현", 대한임베디드공학회논문지, 9(3), pp.173~182 (2014), 대한임베디드공학회[DOI]
- Fixed-point representation &fractional math, "E. L. Oberstar", Oberstar Consulting, ~ (2007)
- M. D. Ciletti, "Advanced Digital Design with the Verilog HDL" (2010), Prentice Hall
- 황연성, "Design of a CMOS Image Sensor Based on a 10-bit Two-Step Single-Slope ADC", JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 14(2), pp.246~251 (2014), 대한전자공학회
- J. Weng, "Camera calibration with distortion models and accuracy evaluation", IEEE Transactions on Pattern Analysis and Machine Intelligence, 14(10), pp.965~980 (1992)
